Message ID | 1431619867-14700-5-git-send-email-linus.walleij@linaro.org |
---|---|
State | Accepted |
Commit | 724814b4fada4a353728c3caa8ad2809c64893b6 |
Headers | show |
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index f024a1c0de8b..853684ad7773 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -190,6 +190,15 @@ reg = <0xa0410000 0x100>; }; + /* + * The backup RAM is used for retention during sleep + * and various things like spin tables + */ + backupram@80150000 { + compatible = "ste,dbx500-backupram"; + reg = <0x80150000 0x2000>; + }; + L2: l2-cache { compatible = "arm,pl310-cache"; reg = <0xa0412000 0x1000>;
The Ux500 SOCs have a special backup RAM that needs to be defined in the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)