diff mbox series

[1/3] PCI: qcom: Introduce enable/disable resource ops

Message ID 20210725040038.3966348-2-bjorn.andersson@linaro.org
State New
Headers show
Series PCI: qcom: Add sc8180x support | expand

Commit Message

Bjorn Andersson July 25, 2021, 4 a.m. UTC 
The current model of doing resource enablement and controller
initialization in a single "init" function invoked after
dw_pcie_host_init() is invoked might result in clocks not being enabled
at the time the "msi" interrupt fires.

One such case happens reliably on the SC8180x (8cx) Snapdragon laptops,
where it's seems like the bootloader touches PCIe and leaves things in a
state that the "msi" interrupt will fire before we have a change to
enable the clocks, resulting in an access of unclocked hardware.

Introduce a two new callbacks, allowing the individual resource handling
functions to be split between enable/init and deinit/disable.

Helper functions for enable, disable and deinit are introduced to handle
the fact that these functions may now be left without implementation.
init is given a wrapper for symmetry.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/pci/controller/dwc/pcie-qcom.c | 42 +++++++++++++++++++++++---
 1 file changed, 38 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 8a7a300163e5..8a64a126de2b 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -181,9 +181,11 @@  struct qcom_pcie;
 
 struct qcom_pcie_ops {
 	int (*get_resources)(struct qcom_pcie *pcie);
+	int (*enable_resources)(struct qcom_pcie *pcie);
 	int (*init)(struct qcom_pcie *pcie);
 	int (*post_init)(struct qcom_pcie *pcie);
 	void (*deinit)(struct qcom_pcie *pcie);
+	void (*disable_resources)(struct qcom_pcie *pcie);
 	void (*post_deinit)(struct qcom_pcie *pcie);
 	void (*ltssm_enable)(struct qcom_pcie *pcie);
 	int (*config_sid)(struct qcom_pcie *pcie);
@@ -1345,6 +1347,31 @@  static int qcom_pcie_config_sid_sm8250(struct qcom_pcie *pcie)
 	return 0;
 }
 
+static int qcom_pcie_enable_resources(struct qcom_pcie *pcie)
+{
+	if (pcie->ops->enable_resources)
+		return pcie->ops->enable_resources(pcie);
+
+	return 0;
+}
+
+static int qcom_pcie_init(struct qcom_pcie *pcie)
+{
+	return pcie->ops->init(pcie);
+}
+
+static void qcom_pcie_deinit(struct qcom_pcie *pcie)
+{
+	if (pcie->ops->deinit)
+		pcie->ops->deinit(pcie);
+}
+
+static void qcom_pcie_disable_resources(struct qcom_pcie *pcie)
+{
+	if (pcie->ops->disable_resources)
+		pcie->ops->disable_resources(pcie);
+}
+
 static int qcom_pcie_host_init(struct pcie_port *pp)
 {
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
@@ -1353,7 +1380,7 @@  static int qcom_pcie_host_init(struct pcie_port *pp)
 
 	qcom_ep_reset_assert(pcie);
 
-	ret = pcie->ops->init(pcie);
+	ret = qcom_pcie_init(pcie);
 	if (ret)
 		return ret;
 
@@ -1384,7 +1411,7 @@  static int qcom_pcie_host_init(struct pcie_port *pp)
 err_disable_phy:
 	phy_power_off(pcie->phy);
 err_deinit:
-	pcie->ops->deinit(pcie);
+	qcom_pcie_deinit(pcie);
 
 	return ret;
 }
@@ -1520,10 +1547,14 @@  static int qcom_pcie_probe(struct platform_device *pdev)
 
 	pp->ops = &qcom_pcie_dw_ops;
 
+	ret = qcom_pcie_enable_resources(pcie);
+	if (ret)
+		goto err_pm_runtime_put;
+
 	ret = phy_init(pcie->phy);
 	if (ret) {
 		pm_runtime_disable(&pdev->dev);
-		goto err_pm_runtime_put;
+		goto err_disable_resources;
 	}
 
 	platform_set_drvdata(pdev, pcie);
@@ -1532,11 +1563,14 @@  static int qcom_pcie_probe(struct platform_device *pdev)
 	if (ret) {
 		dev_err(dev, "cannot initialize host\n");
 		pm_runtime_disable(&pdev->dev);
-		goto err_pm_runtime_put;
+		goto err_disable_resources;
 	}
 
 	return 0;
 
+err_disable_resources:
+	qcom_pcie_disable_resources(pcie);
+
 err_pm_runtime_put:
 	pm_runtime_put(dev);
 	pm_runtime_disable(dev);