From patchwork Mon Jul 26 12:54:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 487074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9F40C4320A for ; Mon, 26 Jul 2021 12:54:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AA06860F6B for ; Mon, 26 Jul 2021 12:54:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234111AbhGZMNv (ORCPT ); Mon, 26 Jul 2021 08:13:51 -0400 Received: from mga01.intel.com ([192.55.52.88]:41724 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234253AbhGZMNv (ORCPT ); Mon, 26 Jul 2021 08:13:51 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10056"; a="234080734" X-IronPort-AV: E=Sophos;i="5.84,270,1620716400"; d="scan'208";a="234080734" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jul 2021 05:54:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,270,1620716400"; d="scan'208";a="463926464" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga008.jf.intel.com with ESMTP; 26 Jul 2021 05:54:12 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 8A4C349; Mon, 26 Jul 2021 15:54:41 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Serge Semin , Lee Jones , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Hoan Tran , Serge Semin , Linus Walleij , Bartosz Golaszewski Subject: [PATCH v1 2/4] gpio: dwapb: Read GPIO base from gpio-base property Date: Mon, 26 Jul 2021 15:54:34 +0300 Message-Id: <20210726125436.58685-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210726125436.58685-1-andriy.shevchenko@linux.intel.com> References: <20210726125436.58685-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org For backward compatibility with some legacy devices introduce a new (*) property gpio-base to read GPIO base. This will allow further cleanup of the driver. *) Note, it's not new for GPIO library since mockup driver is using it already. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-dwapb.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index f6ae69d5d644..e3011d4e17b0 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -581,7 +581,8 @@ static struct dwapb_platform_data *dwapb_gpio_get_pdata(struct device *dev) pp->ngpio = DWAPB_MAX_GPIOS; } - pp->gpio_base = -1; + if (fwnode_property_read_u32(fwnode, "gpio-base", &pp->gpio_base)) + pp->gpio_base = -1; /* * Only port A can provide interrupts in all configurations of