diff mbox series

[for-6.2,07/25] armsse: Wire up systick cpuclk clock

Message ID 20210812093356.1946-8-peter.maydell@linaro.org
State Superseded
Headers show
Series arm: Get rid of system_clock_scale global | expand

Commit Message

Peter Maydell Aug. 12, 2021, 9:33 a.m. UTC
Wire up the cpuclk for the systick devices to the SSE object's
existing mainclk clock.

We do not wire up the refclk because the SSE subsystems do not
provide a refclk.  (This is documented in the IoTKit and SSE-200
TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the
same approach.) When we update the systick device later to honour "no
refclk connected" this will fix a minor emulation inaccuracy for the
SSE-based boards.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 hw/arm/armsse.c | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.20.1

Comments

Alistair Francis Aug. 13, 2021, 1:29 a.m. UTC | #1
On Thu, Aug 12, 2021 at 7:42 PM Peter Maydell <peter.maydell@linaro.org> wrote:
>

> Wire up the cpuclk for the systick devices to the SSE object's

> existing mainclk clock.

>

> We do not wire up the refclk because the SSE subsystems do not

> provide a refclk.  (This is documented in the IoTKit and SSE-200

> TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the

> same approach.) When we update the systick device later to honour "no

> refclk connected" this will fix a minor emulation inaccuracy for the

> SSE-based boards.

>

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Acked-by: Alistair Francis <alistair.francis@wdc.com>


Alistair

> ---

>  hw/arm/armsse.c | 3 +++

>  1 file changed, 3 insertions(+)

>

> diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c

> index a1456cb0f42..70b52c3d4b9 100644

> --- a/hw/arm/armsse.c

> +++ b/hw/arm/armsse.c

> @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp)

>          int j;

>          char *gpioname;

>

> +        qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk);

> +        /* The SSE subsystems do not wire up a systick refclk */

> +

>          qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS);

>          /*

>           * In real hardware the initial Secure VTOR is set from the INITSVTOR*

> --

> 2.20.1

>

>
Luc Michel Aug. 17, 2021, 9:36 a.m. UTC | #2
On 10:33 Thu 12 Aug     , Peter Maydell wrote:
> Wire up the cpuclk for the systick devices to the SSE object's

> existing mainclk clock.

> 

> We do not wire up the refclk because the SSE subsystems do not

> provide a refclk.  (This is documented in the IoTKit and SSE-200

> TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the

> same approach.) When we update the systick device later to honour "no

> refclk connected" this will fix a minor emulation inaccuracy for the

> SSE-based boards.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-by: Luc Michel <luc@lmichel.fr>


> ---

>  hw/arm/armsse.c | 3 +++

>  1 file changed, 3 insertions(+)

> 

> diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c

> index a1456cb0f42..70b52c3d4b9 100644

> --- a/hw/arm/armsse.c

> +++ b/hw/arm/armsse.c

> @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp)

>          int j;

>          char *gpioname;

>  

> +        qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk);

> +        /* The SSE subsystems do not wire up a systick refclk */

> +

>          qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS);

>          /*

>           * In real hardware the initial Secure VTOR is set from the INITSVTOR*

> -- 

> 2.20.1

> 


--
diff mbox series

Patch

diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index a1456cb0f42..70b52c3d4b9 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -995,6 +995,9 @@  static void armsse_realize(DeviceState *dev, Error **errp)
         int j;
         char *gpioname;
 
+        qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk);
+        /* The SSE subsystems do not wire up a systick refclk */
+
         qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS);
         /*
          * In real hardware the initial Secure VTOR is set from the INITSVTOR*