| Message ID | 20210818191920.390759-16-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | Unaligned access for user-only | expand |
On Wed, 18 Aug 2021 at 20:26, Richard Henderson <richard.henderson@linaro.org> wrote: > > Cc: Yoshinori Sato <ysato@users.sourceforge.jp> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > linux-user/sh4/cpu_loop.c | 8 ++++++++ > target/sh4/cpu.c | 2 +- > target/sh4/op_helper.c | 3 --- > 3 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c > index 222ed1c670..21d97250a8 100644 > --- a/linux-user/sh4/cpu_loop.c > +++ b/linux-user/sh4/cpu_loop.c > @@ -71,6 +71,14 @@ void cpu_loop(CPUSH4State *env) > info._sifields._sigfault._addr = env->tea; > queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); > break; > + case 0xe0: > + case 0x100: > + info.si_signo = TARGET_SIGBUS; > + info.si_errno = 0; > + info.si_code = TARGET_BUS_ADRALN; > + info._sifields._sigfault._addr = env->tea; > + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); > + break; > case EXCP_ATOMIC: > cpu_exec_step_atomic(cs); > arch_interrupt = false; Doesn't this have to wait until after the later patches in the series that implement the "actually don't worry about alignment on most sh4 load/stores" ? -- PMM
On 8/19/21 5:46 AM, Peter Maydell wrote: > On Wed, 18 Aug 2021 at 20:26, Richard Henderson > <richard.henderson@linaro.org> wrote: >> >> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> linux-user/sh4/cpu_loop.c | 8 ++++++++ >> target/sh4/cpu.c | 2 +- >> target/sh4/op_helper.c | 3 --- >> 3 files changed, 9 insertions(+), 4 deletions(-) >> >> diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c >> index 222ed1c670..21d97250a8 100644 >> --- a/linux-user/sh4/cpu_loop.c >> +++ b/linux-user/sh4/cpu_loop.c >> @@ -71,6 +71,14 @@ void cpu_loop(CPUSH4State *env) >> info._sifields._sigfault._addr = env->tea; >> queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); >> break; >> + case 0xe0: >> + case 0x100: >> + info.si_signo = TARGET_SIGBUS; >> + info.si_errno = 0; >> + info.si_code = TARGET_BUS_ADRALN; >> + info._sifields._sigfault._addr = env->tea; >> + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); >> + break; >> case EXCP_ATOMIC: >> cpu_exec_step_atomic(cs); >> arch_interrupt = false; > > Doesn't this have to wait until after the later patches in the > series that implement the "actually don't worry about alignment > on most sh4 load/stores" ? Hmm. I don't think that helps. The only thing that delaying this patch would do is hit the assert in cpu_unaligned_access() due to an alignment fault occurring but not having the do_unaligned_access hook set. I think the real requirement is that the tcg/i386 patch that enforces the alignment is delayed until after all of the prctl patches. r~
diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index 222ed1c670..21d97250a8 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -71,6 +71,14 @@ void cpu_loop(CPUSH4State *env) info._sifields._sigfault._addr = env->tea; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; + case 0xe0: + case 0x100: + info.si_signo = TARGET_SIGBUS; + info.si_errno = 0; + info.si_code = TARGET_BUS_ADRALN; + info._sifields._sigfault._addr = env->tea; + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); arch_interrupt = false; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 8326922942..b60234cd31 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -238,10 +238,10 @@ static const struct TCGCPUOps superh_tcg_ops = { .synchronize_from_tb = superh_cpu_synchronize_from_tb, .cpu_exec_interrupt = superh_cpu_exec_interrupt, .tlb_fill = superh_cpu_tlb_fill, + .do_unaligned_access = superh_cpu_do_unaligned_access, #ifndef CONFIG_USER_ONLY .do_interrupt = superh_cpu_do_interrupt, - .do_unaligned_access = superh_cpu_do_unaligned_access, .io_recompile_replay_branch = superh_io_recompile_replay_branch, #endif /* !CONFIG_USER_ONLY */ }; diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index d6d70c339f..b46fc1bf11 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -23,7 +23,6 @@ #include "exec/cpu_ldst.h" #include "fpu/softfloat.h" -#ifndef CONFIG_USER_ONLY void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, @@ -46,8 +45,6 @@ void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, cpu_loop_exit_restore(cs, retaddr); } -#endif - void helper_ldtlb(CPUSH4State *env) { #ifdef CONFIG_USER_ONLY
Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- linux-user/sh4/cpu_loop.c | 8 ++++++++ target/sh4/cpu.c | 2 +- target/sh4/op_helper.c | 3 --- 3 files changed, 9 insertions(+), 4 deletions(-) -- 2.25.1