| Message ID | 20211005231323.2663520-6-bjorn.andersson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | drm/msm/dp: Support multiple DP instances and add sc8180x | expand |
Quoting Bjorn Andersson (2021-10-05 16:13:21) > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index bdaf227f05dc..674cddfee5b0 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -79,6 +79,8 @@ struct dp_display_private { > char *name; > int irq; > > + unsigned int id; > + > /* state variables */ > bool core_initialized; > bool hpd_irq_on; > @@ -229,7 +231,7 @@ static int dp_display_bind(struct device *dev, struct device *master, > > dp->dp_display.drm_dev = drm; > priv = drm->dev_private; > - priv->dp = &(dp->dp_display); > + priv->dp[dp->id] = &(dp->dp_display); Can we drop the extra parenthesis? > > rc = dp->parser->parse(dp->parser, dp->dp_display.connector_type); > if (rc) { > @@ -269,7 +271,7 @@ static void dp_display_unbind(struct device *dev, struct device *master, > > dp_power_client_deinit(dp->power); > dp_aux_unregister(dp->aux); > - priv->dp = NULL; > + priv->dp[dp->id] = NULL; > } > > static const struct component_ops dp_display_comp_ops = { > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > if (!dp) > return -ENOMEM; > > - desc = dp_display_get_desc(pdev); > + desc = dp_display_get_desc(pdev, &dp->id); I'm sad that dp->id has to match the number in the SoC specific dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c still. Is there any way we can avoid that? Also, notice how those arrays already have INTF_DP macros, which makes me think that it may be better to connect this to those arrays instead of making an msm_dp_desc structure and then make sure the 'type' member matches a connector type number. Otherwise this code is super fragile. > if (!desc) > return -EINVAL; >
On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > index bdaf227f05dc..674cddfee5b0 100644 > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > @@ -79,6 +79,8 @@ struct dp_display_private { > > char *name; > > int irq; > > > > + unsigned int id; > > + > > /* state variables */ > > bool core_initialized; > > bool hpd_irq_on; > > @@ -229,7 +231,7 @@ static int dp_display_bind(struct device *dev, struct device *master, > > > > dp->dp_display.drm_dev = drm; > > priv = drm->dev_private; > > - priv->dp = &(dp->dp_display); > > + priv->dp[dp->id] = &(dp->dp_display); > > Can we drop the extra parenthesis? > Definitely. > > > > rc = dp->parser->parse(dp->parser, dp->dp_display.connector_type); > > if (rc) { > > @@ -269,7 +271,7 @@ static void dp_display_unbind(struct device *dev, struct device *master, > > > > dp_power_client_deinit(dp->power); > > dp_aux_unregister(dp->aux); > > - priv->dp = NULL; > > + priv->dp[dp->id] = NULL; > > } > > > > static const struct component_ops dp_display_comp_ops = { > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > if (!dp) > > return -ENOMEM; > > > > - desc = dp_display_get_desc(pdev); > > + desc = dp_display_get_desc(pdev, &dp->id); > > I'm sad that dp->id has to match the number in the SoC specific > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > still. Is there any way we can avoid that? Also, notice how those arrays > already have INTF_DP macros, which makes me think that it may be better > to connect this to those arrays instead of making an msm_dp_desc > structure and then make sure the 'type' member matches a connector > type number. Otherwise this code is super fragile. > I'm afraid I don't understand what you're proposing. Or which part you consider fragile, the indices of the INTF_DP instances aren't going to move around... I have N instances of the DP driver that I need to match to N entries from the platform specific intf array, I need some stable reference between them. When I started this journey I figured I could rely on the of_graph between the DPU and the interface controllers, but the values used there today are just bogus, so that was a no go. We can use whatever, as long as _dpu_kms_initialize_displayport() can come up with an identifier to put in h_tile_instance[0] so that dpu_encoder_setup_display() can find the relevant INTF. Regards, Bjorn > > if (!desc) > > return -EINVAL; > >
On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > if (!dp) > > > > return -ENOMEM; > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > already have INTF_DP macros, which makes me think that it may be better > > > to connect this to those arrays instead of making an msm_dp_desc > > > structure and then make sure the 'type' member matches a connector > > > type number. Otherwise this code is super fragile. > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > consider fragile, the indices of the INTF_DP instances aren't going to > > move around... > > > > I have N instances of the DP driver that I need to match to N entries > > from the platform specific intf array, I need some stable reference > > between them. When I started this journey I figured I could rely on the > > of_graph between the DPU and the interface controllers, but the values > > used there today are just bogus, so that was a no go. > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > come up with an identifier to put in h_tile_instance[0] so that > > dpu_encoder_setup_display() can find the relevant INTF. > > > > To make it more concrete we can look at sc7180 > > static const struct dpu_intf_cfg sc7180_intf[] = { > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > ^ > | > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > zero, the number after INTF_DP, and that is very relevant. That number > needs to match the dp->id. Somewhere we have a match between > controller_id and dp->id in the code. That number (the 0, not INTF_0) is what the code matches against dp->id in _dpu_kms_initialize_displayport(), in order to figure out that this is INTF_0 in dpu_encoder_setup_display(). I.e. look at the sc8180x patch: INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, which the DPU code will match against to INTF_0, INTF_4 and INTF_5. Regards, Bjorn
On Wed, 6 Oct 2021 at 07:26, Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > if (!dp) > > > > > > return -ENOMEM; > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > structure and then make sure the 'type' member matches a connector > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > move around... > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > from the platform specific intf array, I need some stable reference > > > > between them. When I started this journey I figured I could rely on the > > > > of_graph between the DPU and the interface controllers, but the values > > > > used there today are just bogus, so that was a no go. > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > ^ > > > | > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > zero, the number after INTF_DP, and that is very relevant. That number > > > needs to match the dp->id. Somewhere we have a match between > > > controller_id and dp->id in the code. > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > is INTF_0 in dpu_encoder_setup_display(). > > > > I.e. look at the sc8180x patch: > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > Yep. I'm saying that having to make that number in this intf array match > the order of the register mapping descriptor array is fragile. Why can't > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > map from the descriptor array to this intf array somehow so that the > order of the descriptor array doesn't matter? Then we don't have to put > the connector type in the descriptor array, and we don't have to keep > the order of the array a certain way to match this intf descriptor. The order of the descriptor array does not matter currently (or we do not understand fully your concern). The encoder is mapped to intf using type + controller_id (next field after INTF_foo). Also having the controller_id in the descs array allows us to simplify DSI code (where DSI_0 is master and DSI_1 is slave, no matter which INTF they are associated with). Last, but not least, maybe I'd point you to one of the proposed cleanup patches: https://lore.kernel.org/linux-arm-msm/20210515225757.1989955-5-dmitry.baryshkov@linaro.org/ It removes one extra level of indirection in interface association. > > Maybe > > struct msm_dp_desc { > phys_addr_t io_start; > unsigned int id; > }; > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > intf from DPU here in the DP driver to find the id and type of connector > that should be used by default? Still sort of fragile because the only > connection is an unsigned int which isn't great, but at least it's > explicit instead of implicit based on the array order. It would move indirection, because we'd still have to map INTF_N <-> priv->dp[j]. -- With best wishes Dmitry
Quoting Dmitry Baryshkov (2021-10-05 23:10:22) > On Wed, 6 Oct 2021 at 07:26, Stephen Boyd <swboyd@chromium.org> wrote: > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > if (!dp) > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > move around... > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > from the platform specific intf array, I need some stable reference > > > > > between them. When I started this journey I figured I could rely on the > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > ^ > > > > | > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > needs to match the dp->id. Somewhere we have a match between > > > > controller_id and dp->id in the code. > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > I.e. look at the sc8180x patch: > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > the order of the register mapping descriptor array is fragile. Why can't > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > map from the descriptor array to this intf array somehow so that the > > order of the descriptor array doesn't matter? Then we don't have to put > > the connector type in the descriptor array, and we don't have to keep > > the order of the array a certain way to match this intf descriptor. > > The order of the descriptor array does not matter currently (or we do > not understand fully your concern). > The encoder is mapped to intf using type + controller_id (next field > after INTF_foo). > Also having the controller_id in the descs array allows us to simplify > DSI code (where DSI_0 is master and DSI_1 is slave, no matter which > INTF they are associated with). The order seems to matter for me. Otherwise I get various vblank timeouts and the eDP panel doesn't light up. I'm using the previous version of this patch series though so maybe something got fixed in the meantime. If I change the controller_id to match my new ordering of the descriptor array then it works again. So somehow controller_id needs to match dp->id? > > Last, but not least, maybe I'd point you to one of the proposed > cleanup patches: > https://lore.kernel.org/linux-arm-msm/20210515225757.1989955-5-dmitry.baryshkov@linaro.org/ > It removes one extra level of indirection in interface association. > Thanks for the link.
Hi, On Wed, 6 Oct 2021 at 10:06, Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Dmitry Baryshkov (2021-10-05 23:10:22) > > On Wed, 6 Oct 2021 at 07:26, Stephen Boyd <swboyd@chromium.org> wrote: > > > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > > if (!dp) > > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > > move around... > > > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > > from the platform specific intf array, I need some stable reference > > > > > > between them. When I started this journey I figured I could rely on the > > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > ^ > > > > > | > > > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > > needs to match the dp->id. Somewhere we have a match between > > > > > controller_id and dp->id in the code. > > > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > > > I.e. look at the sc8180x patch: > > > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > > the order of the register mapping descriptor array is fragile. Why can't > > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > > map from the descriptor array to this intf array somehow so that the > > > order of the descriptor array doesn't matter? Then we don't have to put > > > the connector type in the descriptor array, and we don't have to keep > > > the order of the array a certain way to match this intf descriptor. > > > > The order of the descriptor array does not matter currently (or we do > > not understand fully your concern). > > The encoder is mapped to intf using type + controller_id (next field > > after INTF_foo). > > Also having the controller_id in the descs array allows us to simplify > > DSI code (where DSI_0 is master and DSI_1 is slave, no matter which > > INTF they are associated with). > > The order seems to matter for me. Otherwise I get various vblank > timeouts and the eDP panel doesn't light up. I'm using the previous > version of this patch series though so maybe something got fixed in the > meantime. If I change the controller_id to match my new ordering of the > descriptor array then it works again. So somehow controller_id needs to > match dp->id? Yes, controller_id should match. However the order of entries in the array should not matter. If it does, it's clearly an issue somewhere. > > > > > Last, but not least, maybe I'd point you to one of the proposed > > cleanup patches: > > https://lore.kernel.org/linux-arm-msm/20210515225757.1989955-5-dmitry.baryshkov@linaro.org/ > > It removes one extra level of indirection in interface association. > > > > Thanks for the link. -- With best wishes Dmitry
On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > if (!dp) > > > > > > return -ENOMEM; > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > structure and then make sure the 'type' member matches a connector > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > move around... > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > from the platform specific intf array, I need some stable reference > > > > between them. When I started this journey I figured I could rely on the > > > > of_graph between the DPU and the interface controllers, but the values > > > > used there today are just bogus, so that was a no go. > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > ^ > > > | > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > zero, the number after INTF_DP, and that is very relevant. That number > > > needs to match the dp->id. Somewhere we have a match between > > > controller_id and dp->id in the code. > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > is INTF_0 in dpu_encoder_setup_display(). > > > > I.e. look at the sc8180x patch: > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > Yep. I'm saying that having to make that number in this intf array match > the order of the register mapping descriptor array is fragile. Why can't > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > map from the descriptor array to this intf array somehow so that the > order of the descriptor array doesn't matter? Then we don't have to put > the connector type in the descriptor array, and we don't have to keep > the order of the array a certain way to match this intf descriptor. > > Maybe > > struct msm_dp_desc { > phys_addr_t io_start; > unsigned int id; The INTF_<N> constants are a property of the DPU driver and not available in the DP driver and the msm_dp struct is a property of the DP driver and can't be dereferenced in the DPU driver. The proposed way around this is that the descs array defines the order in priv->dp[N] and this N is used as controller_id. So the only thing that I don't find straight forward here is that the eDP controller is considered just a DP controller, so you have to use INTF_DP, <N> for that, and not just INTF_EDP, 0. > }; > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > intf from DPU here in the DP driver to find the id and type of connector > that should be used by default? Still sort of fragile because the only > connection is an unsigned int which isn't great, but at least it's > explicit instead of implicit based on the array order. No matter how I look at this, you need to put some number somewhere here that will be used to match up the INTF with the right DSI/DP encoder. Using the proposed number scheme follows the numbering of all the DP controllers from the documentation. Regards, Bjorn
Quoting Bjorn Andersson (2021-10-06 10:07:17) > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > if (!dp) > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > move around... > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > from the platform specific intf array, I need some stable reference > > > > > between them. When I started this journey I figured I could rely on the > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > ^ > > > > | > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > needs to match the dp->id. Somewhere we have a match between > > > > controller_id and dp->id in the code. > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > I.e. look at the sc8180x patch: > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > the order of the register mapping descriptor array is fragile. Why can't > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > map from the descriptor array to this intf array somehow so that the > > order of the descriptor array doesn't matter? Then we don't have to put > > the connector type in the descriptor array, and we don't have to keep > > the order of the array a certain way to match this intf descriptor. > > > > Maybe > > > > struct msm_dp_desc { > > phys_addr_t io_start; > > unsigned int id; > > The INTF_<N> constants are a property of the DPU driver and not > available in the DP driver and the msm_dp struct is a property of the DP > driver and can't be dereferenced in the DPU driver. > > The proposed way around this is that the descs array defines the order > in priv->dp[N] and this N is used as controller_id. I'm pretty sure I'm following along. > > So the only thing that I don't find straight forward here is that the > eDP controller is considered just a DP controller, so you have to use > INTF_DP, <N> for that, and not just INTF_EDP, 0. > > > }; > > > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > > intf from DPU here in the DP driver to find the id and type of connector > > that should be used by default? Still sort of fragile because the only > > connection is an unsigned int which isn't great, but at least it's > > explicit instead of implicit based on the array order. > > No matter how I look at this, you need to put some number somewhere here > that will be used to match up the INTF with the right DSI/DP encoder. Correct. > > Using the proposed number scheme follows the numbering of all the DP > controllers from the documentation. > Maybe I can make a better example. I have this for sc7280 in dpu_hw_catalog.c: static const struct dpu_intf_cfg sc7280_intf[] = { INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, CONTROLLER_ID_A, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25), INTF_BLK("intf_1", INTF_1, 0x35000, INTF_DSI, 0, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27), INTF_BLK("intf_5", INTF_5, 0x39000, INTF_DP, CONTROLLER_ID_B, 24, INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 22, 23), }; And then this array for sc7280 in dp_display.c: static const struct msm_dp_desc sc7280_dp_cfg = { .desc = { [CONTROLLER_ID_A] = { 0xaea0000, DRM_MODE_CONNECTOR_eDP }, [CONTROLLER_ID_B] = { 0xae90000, DRM_MODE_CONNECTOR_DisplayPort }, }, .num_dp = 2, }; So these two arrays must match based on CONTROLLER_ID_{A,B}. I don't like having to make these two numbers match so if it was explicit, even possibly by having a bunch of macros put in both places then I would be happy. I spent a few hours when I messed up the order of the sc7280_dp_cfg.desc array trying to figure out why things weren't working.
On 06/10/2021 20:07, Bjorn Andersson wrote: > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > >> Quoting Bjorn Andersson (2021-10-05 19:37:52) >>> On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: >>> >>>> Quoting Bjorn Andersson (2021-10-05 18:43:16) >>>>> On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: >>>>> >>>>>> Quoting Bjorn Andersson (2021-10-05 16:13:21) >>>>>>> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c >>>>>>> index bdaf227f05dc..674cddfee5b0 100644 >>>>>>> --- a/drivers/gpu/drm/msm/dp/dp_display.c >>>>>>> +++ b/drivers/gpu/drm/msm/dp/dp_display.c >>>>>>> @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) >>>>>>> if (!dp) >>>>>>> return -ENOMEM; >>>>>>> >>>>>>> - desc = dp_display_get_desc(pdev); >>>>>>> + desc = dp_display_get_desc(pdev, &dp->id); >>>>>> >>>>>> I'm sad that dp->id has to match the number in the SoC specific >>>>>> dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c >>>>>> still. Is there any way we can avoid that? Also, notice how those arrays >>>>>> already have INTF_DP macros, which makes me think that it may be better >>>>>> to connect this to those arrays instead of making an msm_dp_desc >>>>>> structure and then make sure the 'type' member matches a connector >>>>>> type number. Otherwise this code is super fragile. >>>>>> >>>>> >>>>> I'm afraid I don't understand what you're proposing. Or which part you >>>>> consider fragile, the indices of the INTF_DP instances aren't going to >>>>> move around... >>>>> >>>>> I have N instances of the DP driver that I need to match to N entries >>>>> from the platform specific intf array, I need some stable reference >>>>> between them. When I started this journey I figured I could rely on the >>>>> of_graph between the DPU and the interface controllers, but the values >>>>> used there today are just bogus, so that was a no go. >>>>> >>>>> We can use whatever, as long as _dpu_kms_initialize_displayport() can >>>>> come up with an identifier to put in h_tile_instance[0] so that >>>>> dpu_encoder_setup_display() can find the relevant INTF. >>>>> >>>> >>>> To make it more concrete we can look at sc7180 >>>> >>>> static const struct dpu_intf_cfg sc7180_intf[] = { >>>> INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, >>>> INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), >>>> ^ >>>> | >>>> >>>> intf0 is irrelevant. Also the address is irrelevant. But here we have a >>>> zero, the number after INTF_DP, and that is very relevant. That number >>>> needs to match the dp->id. Somewhere we have a match between >>>> controller_id and dp->id in the code. >>> >>> That number (the 0, not INTF_0) is what the code matches against dp->id >>> in _dpu_kms_initialize_displayport(), in order to figure out that this >>> is INTF_0 in dpu_encoder_setup_display(). >>> >>> I.e. look at the sc8180x patch: >>> >>> INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), >>> INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), >>> INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), >>> /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ >>> INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), >>> INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), >>> INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), >>> >>> Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, >>> which the DPU code will match against to INTF_0, INTF_4 and INTF_5. >>> >> >> Yep. I'm saying that having to make that number in this intf array match >> the order of the register mapping descriptor array is fragile. Why can't >> we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then >> map from the descriptor array to this intf array somehow so that the >> order of the descriptor array doesn't matter? Then we don't have to put >> the connector type in the descriptor array, and we don't have to keep >> the order of the array a certain way to match this intf descriptor. >> >> Maybe >> >> struct msm_dp_desc { >> phys_addr_t io_start; >> unsigned int id; > > The INTF_<N> constants are a property of the DPU driver and not > available in the DP driver and the msm_dp struct is a property of the DP > driver and can't be dereferenced in the DPU driver. > > The proposed way around this is that the descs array defines the order > in priv->dp[N] and this N is used as controller_id. > > > So the only thing that I don't find straight forward here is that the > eDP controller is considered just a DP controller, so you have to use > INTF_DP, <N> for that, and not just INTF_EDP, 0. Would it be better if we change the DPU driver to handle INTF_EDP too? > >> }; >> >> and then have msm_dp_desc::id equal INTF_<N> and then look through the >> intf from DPU here in the DP driver to find the id and type of connector >> that should be used by default? Still sort of fragile because the only >> connection is an unsigned int which isn't great, but at least it's >> explicit instead of implicit based on the array order. > > No matter how I look at this, you need to put some number somewhere here > that will be used to match up the INTF with the right DSI/DP encoder. > > Using the proposed number scheme follows the numbering of all the DP > controllers from the documentation. > > Regards, > Bjorn > -- With best wishes Dmitry
On Wed 06 Oct 10:19 PDT 2021, Stephen Boyd wrote: > Quoting Bjorn Andersson (2021-10-06 10:07:17) > > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > > if (!dp) > > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > > move around... > > > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > > from the platform specific intf array, I need some stable reference > > > > > > between them. When I started this journey I figured I could rely on the > > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > ^ > > > > > | > > > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > > needs to match the dp->id. Somewhere we have a match between > > > > > controller_id and dp->id in the code. > > > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > > > I.e. look at the sc8180x patch: > > > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > > the order of the register mapping descriptor array is fragile. Why can't > > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > > map from the descriptor array to this intf array somehow so that the > > > order of the descriptor array doesn't matter? Then we don't have to put > > > the connector type in the descriptor array, and we don't have to keep > > > the order of the array a certain way to match this intf descriptor. > > > > > > Maybe > > > > > > struct msm_dp_desc { > > > phys_addr_t io_start; > > > unsigned int id; > > > > The INTF_<N> constants are a property of the DPU driver and not > > available in the DP driver and the msm_dp struct is a property of the DP > > driver and can't be dereferenced in the DPU driver. > > > > The proposed way around this is that the descs array defines the order > > in priv->dp[N] and this N is used as controller_id. > > I'm pretty sure I'm following along. > > > > > So the only thing that I don't find straight forward here is that the > > eDP controller is considered just a DP controller, so you have to use > > INTF_DP, <N> for that, and not just INTF_EDP, 0. > > > > > }; > > > > > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > > > intf from DPU here in the DP driver to find the id and type of connector > > > that should be used by default? Still sort of fragile because the only > > > connection is an unsigned int which isn't great, but at least it's > > > explicit instead of implicit based on the array order. > > > > No matter how I look at this, you need to put some number somewhere here > > that will be used to match up the INTF with the right DSI/DP encoder. > > Correct. > > > > > Using the proposed number scheme follows the numbering of all the DP > > controllers from the documentation. > > > > Maybe I can make a better example. I have this for sc7280 in dpu_hw_catalog.c: > > static const struct dpu_intf_cfg sc7280_intf[] = { > INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, CONTROLLER_ID_A, 24, > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > INTF_BLK("intf_1", INTF_1, 0x35000, INTF_DSI, 0, 24, > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > INTF_BLK("intf_5", INTF_5, 0x39000, INTF_DP, CONTROLLER_ID_B, 24, > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > }; > > And then this array for sc7280 in dp_display.c: > > static const struct msm_dp_desc sc7280_dp_cfg = { > .desc = { > [CONTROLLER_ID_A] = { 0xaea0000, DRM_MODE_CONNECTOR_eDP }, > [CONTROLLER_ID_B] = { 0xae90000, DRM_MODE_CONNECTOR_DisplayPort }, > }, > .num_dp = 2, > }; > > So these two arrays must match based on CONTROLLER_ID_{A,B}. I don't > like having to make these two numbers match so if it was explicit, even > possibly by having a bunch of macros put in both places then I would be > happy. I spent a few hours when I messed up the order of the > sc7280_dp_cfg.desc array trying to figure out why things weren't > working. So essentially, you didn't know that the controller_id has to match the index in priv->dsi[] and priv->dp[] and providing a define for them would make this more obvious? I think per your argument the 0 following INTF_DSI should also be using this scheme, so we'd have multiple CONTROLLER_ID_A, which probably is confusing as well. I tried it out with below patch; it documents the relationship, provides constants for the magic 2 and 3 for number of DSI and DP controllers in struct msm_drm_private. I like it. Regards, Bjorn diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 60eed3128b54..e9510083f568 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -918,13 +918,13 @@ static const struct dpu_intf_cfg sc7280_intf[] = { }; static const struct dpu_intf_cfg sc8180x_intf[] = { - INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), - INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), - INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), + INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, DP_CONTROLLER_0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), + INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, DSI_CONTROLLER_0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), + INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, DSI_CONTROLLER_1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), - INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), - INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), + INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, DP_CONTROLLER_1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), + INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, DP_CONTROLLER_2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), }; /************************************************************* diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 41a6f58916e6..feccdc59b181 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -132,16 +132,16 @@ struct msm_dp_config { static const struct msm_dp_config sc7180_dp_cfg = { .descs = (struct msm_dp_desc[]) { - { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + [DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, }, .num_descs = 1, }; static const struct msm_dp_config sc8180x_dp_cfg = { .descs = (struct msm_dp_desc[]) { - { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, - { .io_start = 0x0ae98000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, - { .io_start = 0x0ae9a000, .connector_type = DRM_MODE_CONNECTOR_eDP }, + [DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + [DP_CONTROLLER_1] = { .io_start = 0x0ae98000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + [DP_CONTROLLER_2] = { .io_start = 0x0ae9a000, .connector_type = DRM_MODE_CONNECTOR_eDP }, }, .num_descs = 3, }; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 2e84dc30e12e..af572d1297ea 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -68,6 +68,19 @@ enum msm_mdp_plane_property { PLANE_PROP_MAX_NUM }; +enum msm_dsi_controllers { + DSI_CONTROLLER_0, + DSI_CONTROLLER_1, + DSI_CONTROLLER_COUNT, +}; + +enum msm_dp_controllers { + DP_CONTROLLER_0, + DP_CONTROLLER_1, + DP_CONTROLLER_2, + DP_CONTROLLER_COUNT, +}; + #define MSM_GPU_MAX_RINGS 4 #define MAX_H_TILES_PER_DISPLAY 2 @@ -159,9 +172,9 @@ struct msm_drm_private { struct msm_edp *edp; /* DSI is shared by mdp4 and mdp5 */ - struct msm_dsi *dsi[2]; + struct msm_dsi *dsi[DSI_CONTROLLER_COUNT]; - struct msm_dp *dp[3]; + struct msm_dp *dp[DP_CONTROLLER_COUNT]; /* when we have more than one 'msm_gpu' these need to be an array: */ struct msm_gpu *gpu;
On Wed 06 Oct 10:19 PDT 2021, Dmitry Baryshkov wrote: > On 06/10/2021 20:07, Bjorn Andersson wrote: > > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > > if (!dp) > > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > > move around... > > > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > > from the platform specific intf array, I need some stable reference > > > > > > between them. When I started this journey I figured I could rely on the > > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > ^ > > > > > | > > > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > > needs to match the dp->id. Somewhere we have a match between > > > > > controller_id and dp->id in the code. > > > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > > > I.e. look at the sc8180x patch: > > > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > > the order of the register mapping descriptor array is fragile. Why can't > > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > > map from the descriptor array to this intf array somehow so that the > > > order of the descriptor array doesn't matter? Then we don't have to put > > > the connector type in the descriptor array, and we don't have to keep > > > the order of the array a certain way to match this intf descriptor. > > > > > > Maybe > > > > > > struct msm_dp_desc { > > > phys_addr_t io_start; > > > unsigned int id; > > > > The INTF_<N> constants are a property of the DPU driver and not > > available in the DP driver and the msm_dp struct is a property of the DP > > driver and can't be dereferenced in the DPU driver. > > > > The proposed way around this is that the descs array defines the order > > in priv->dp[N] and this N is used as controller_id. > > > > > > So the only thing that I don't find straight forward here is that the > > eDP controller is considered just a DP controller, so you have to use > > INTF_DP, <N> for that, and not just INTF_EDP, 0. > > Would it be better if we change the DPU driver to handle INTF_EDP too? > I looked at that a while back and given that we can't look inside any of the DP structs the only sensible solution I could come up with was to create another array in struct msm_drm_private with "edp controllers". But that means everywhere we today poke at priv->dp we need to also poke at priv->edp. And the only gain is that we can say that the eDP controller is INTF_EDP. And if there's ever a controller that could do both, then that breaks down anyways. Regards, Bjorn > > > > > }; > > > > > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > > > intf from DPU here in the DP driver to find the id and type of connector > > > that should be used by default? Still sort of fragile because the only > > > connection is an unsigned int which isn't great, but at least it's > > > explicit instead of implicit based on the array order. > > > > No matter how I look at this, you need to put some number somewhere here > > that will be used to match up the INTF with the right DSI/DP encoder. > > > > Using the proposed number scheme follows the numbering of all the DP > > controllers from the documentation. > > > > Regards, > > Bjorn > > > > > -- > With best wishes > Dmitry
Quoting Bjorn Andersson (2021-10-06 11:05:09) > On Wed 06 Oct 10:19 PDT 2021, Stephen Boyd wrote: > > > Quoting Bjorn Andersson (2021-10-06 10:07:17) > > > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > > > > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > > > if (!dp) > > > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > > > move around... > > > > > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > > > from the platform specific intf array, I need some stable reference > > > > > > > between them. When I started this journey I figured I could rely on the > > > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > > ^ > > > > > > | > > > > > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > > > needs to match the dp->id. Somewhere we have a match between > > > > > > controller_id and dp->id in the code. > > > > > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > > > > > I.e. look at the sc8180x patch: > > > > > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > > > the order of the register mapping descriptor array is fragile. Why can't > > > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > > > map from the descriptor array to this intf array somehow so that the > > > > order of the descriptor array doesn't matter? Then we don't have to put > > > > the connector type in the descriptor array, and we don't have to keep > > > > the order of the array a certain way to match this intf descriptor. > > > > > > > > Maybe > > > > > > > > struct msm_dp_desc { > > > > phys_addr_t io_start; > > > > unsigned int id; > > > > > > The INTF_<N> constants are a property of the DPU driver and not > > > available in the DP driver and the msm_dp struct is a property of the DP > > > driver and can't be dereferenced in the DPU driver. > > > > > > The proposed way around this is that the descs array defines the order > > > in priv->dp[N] and this N is used as controller_id. > > > > I'm pretty sure I'm following along. > > > > > > > > So the only thing that I don't find straight forward here is that the > > > eDP controller is considered just a DP controller, so you have to use > > > INTF_DP, <N> for that, and not just INTF_EDP, 0. > > > > > > > }; > > > > > > > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > > > > intf from DPU here in the DP driver to find the id and type of connector > > > > that should be used by default? Still sort of fragile because the only > > > > connection is an unsigned int which isn't great, but at least it's > > > > explicit instead of implicit based on the array order. > > > > > > No matter how I look at this, you need to put some number somewhere here > > > that will be used to match up the INTF with the right DSI/DP encoder. > > > > Correct. > > > > > > > > Using the proposed number scheme follows the numbering of all the DP > > > controllers from the documentation. > > > > > > > Maybe I can make a better example. I have this for sc7280 in dpu_hw_catalog.c: > > > > static const struct dpu_intf_cfg sc7280_intf[] = { > > INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, CONTROLLER_ID_A, 24, > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > INTF_BLK("intf_1", INTF_1, 0x35000, INTF_DSI, 0, 24, > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > INTF_BLK("intf_5", INTF_5, 0x39000, INTF_DP, CONTROLLER_ID_B, 24, > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > }; > > > > And then this array for sc7280 in dp_display.c: > > > > static const struct msm_dp_desc sc7280_dp_cfg = { > > .desc = { > > [CONTROLLER_ID_A] = { 0xaea0000, DRM_MODE_CONNECTOR_eDP }, > > [CONTROLLER_ID_B] = { 0xae90000, DRM_MODE_CONNECTOR_DisplayPort }, > > }, > > .num_dp = 2, > > }; > > > > So these two arrays must match based on CONTROLLER_ID_{A,B}. I don't > > like having to make these two numbers match so if it was explicit, even > > possibly by having a bunch of macros put in both places then I would be > > happy. I spent a few hours when I messed up the order of the > > sc7280_dp_cfg.desc array trying to figure out why things weren't > > working. > > So essentially, you didn't know that the controller_id has to match the > index in priv->dsi[] and priv->dp[] and providing a define for them > would make this more obvious? Now you got it! > > I think per your argument the 0 following INTF_DSI should also be using > this scheme, so we'd have multiple CONTROLLER_ID_A, which probably is > confusing as well. Agreed. > > I tried it out with below patch; it documents the relationship, provides > constants for the magic 2 and 3 for number of DSI and DP controllers in > struct msm_drm_private. > > I like it. Thanks. I prefer this approach as well. I can see now why qcom always wants to change the output ports on the DPU node in DT to match the INTF number. If they would have described this problem it may have made sense to have the graph endpoints with reg properties matching the interface number in the intf array. Sigh.
On Wed 06 Oct 11:59 PDT 2021, Stephen Boyd wrote: > Quoting Bjorn Andersson (2021-10-06 11:05:09) > > On Wed 06 Oct 10:19 PDT 2021, Stephen Boyd wrote: > > > > > Quoting Bjorn Andersson (2021-10-06 10:07:17) > > > > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) > > > > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) > > > > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: > > > > > > > > > > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) > > > > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 > > > > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > > > > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) > > > > > > > > > > if (!dp) > > > > > > > > > > return -ENOMEM; > > > > > > > > > > > > > > > > > > > > - desc = dp_display_get_desc(pdev); > > > > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); > > > > > > > > > > > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific > > > > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > > > > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays > > > > > > > > > already have INTF_DP macros, which makes me think that it may be better > > > > > > > > > to connect this to those arrays instead of making an msm_dp_desc > > > > > > > > > structure and then make sure the 'type' member matches a connector > > > > > > > > > type number. Otherwise this code is super fragile. > > > > > > > > > > > > > > > > > > > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you > > > > > > > > consider fragile, the indices of the INTF_DP instances aren't going to > > > > > > > > move around... > > > > > > > > > > > > > > > > I have N instances of the DP driver that I need to match to N entries > > > > > > > > from the platform specific intf array, I need some stable reference > > > > > > > > between them. When I started this journey I figured I could rely on the > > > > > > > > of_graph between the DPU and the interface controllers, but the values > > > > > > > > used there today are just bogus, so that was a no go. > > > > > > > > > > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can > > > > > > > > come up with an identifier to put in h_tile_instance[0] so that > > > > > > > > dpu_encoder_setup_display() can find the relevant INTF. > > > > > > > > > > > > > > > > > > > > > > To make it more concrete we can look at sc7180 > > > > > > > > > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { > > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, > > > > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > > > ^ > > > > > > > | > > > > > > > > > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a > > > > > > > zero, the number after INTF_DP, and that is very relevant. That number > > > > > > > needs to match the dp->id. Somewhere we have a match between > > > > > > > controller_id and dp->id in the code. > > > > > > > > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id > > > > > > in _dpu_kms_initialize_displayport(), in order to figure out that this > > > > > > is INTF_0 in dpu_encoder_setup_display(). > > > > > > > > > > > > I.e. look at the sc8180x patch: > > > > > > > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), > > > > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ > > > > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), > > > > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), > > > > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > > > > > > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, > > > > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. > > > > > > > > > > > > > > > > Yep. I'm saying that having to make that number in this intf array match > > > > > the order of the register mapping descriptor array is fragile. Why can't > > > > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then > > > > > map from the descriptor array to this intf array somehow so that the > > > > > order of the descriptor array doesn't matter? Then we don't have to put > > > > > the connector type in the descriptor array, and we don't have to keep > > > > > the order of the array a certain way to match this intf descriptor. > > > > > > > > > > Maybe > > > > > > > > > > struct msm_dp_desc { > > > > > phys_addr_t io_start; > > > > > unsigned int id; > > > > > > > > The INTF_<N> constants are a property of the DPU driver and not > > > > available in the DP driver and the msm_dp struct is a property of the DP > > > > driver and can't be dereferenced in the DPU driver. > > > > > > > > The proposed way around this is that the descs array defines the order > > > > in priv->dp[N] and this N is used as controller_id. > > > > > > I'm pretty sure I'm following along. > > > > > > > > > > > So the only thing that I don't find straight forward here is that the > > > > eDP controller is considered just a DP controller, so you have to use > > > > INTF_DP, <N> for that, and not just INTF_EDP, 0. > > > > > > > > > }; > > > > > > > > > > and then have msm_dp_desc::id equal INTF_<N> and then look through the > > > > > intf from DPU here in the DP driver to find the id and type of connector > > > > > that should be used by default? Still sort of fragile because the only > > > > > connection is an unsigned int which isn't great, but at least it's > > > > > explicit instead of implicit based on the array order. > > > > > > > > No matter how I look at this, you need to put some number somewhere here > > > > that will be used to match up the INTF with the right DSI/DP encoder. > > > > > > Correct. > > > > > > > > > > > Using the proposed number scheme follows the numbering of all the DP > > > > controllers from the documentation. > > > > > > > > > > Maybe I can make a better example. I have this for sc7280 in dpu_hw_catalog.c: > > > > > > static const struct dpu_intf_cfg sc7280_intf[] = { > > > INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, CONTROLLER_ID_A, 24, > > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25), > > > INTF_BLK("intf_1", INTF_1, 0x35000, INTF_DSI, 0, 24, > > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27), > > > INTF_BLK("intf_5", INTF_5, 0x39000, INTF_DP, CONTROLLER_ID_B, 24, > > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 22, 23), > > > }; > > > > > > And then this array for sc7280 in dp_display.c: > > > > > > static const struct msm_dp_desc sc7280_dp_cfg = { > > > .desc = { > > > [CONTROLLER_ID_A] = { 0xaea0000, DRM_MODE_CONNECTOR_eDP }, > > > [CONTROLLER_ID_B] = { 0xae90000, DRM_MODE_CONNECTOR_DisplayPort }, > > > }, > > > .num_dp = 2, > > > }; > > > > > > So these two arrays must match based on CONTROLLER_ID_{A,B}. I don't > > > like having to make these two numbers match so if it was explicit, even > > > possibly by having a bunch of macros put in both places then I would be > > > happy. I spent a few hours when I messed up the order of the > > > sc7280_dp_cfg.desc array trying to figure out why things weren't > > > working. > > > > So essentially, you didn't know that the controller_id has to match the > > index in priv->dsi[] and priv->dp[] and providing a define for them > > would make this more obvious? > > Now you got it! > > > > > I think per your argument the 0 following INTF_DSI should also be using > > this scheme, so we'd have multiple CONTROLLER_ID_A, which probably is > > confusing as well. > > Agreed. > > > > > I tried it out with below patch; it documents the relationship, provides > > constants for the magic 2 and 3 for number of DSI and DP controllers in > > struct msm_drm_private. > > > > I like it. > > Thanks. I prefer this approach as well. Sweet, I'll update my patch set accordingly. > I can see now why qcom always wants to change the output ports on the > DPU node in DT to match the INTF number. If they would have described > this problem it may have made sense to have the graph endpoints with > reg properties matching the interface number in the intf array. Sigh. Yes, I think the supposed design is that you should use the of_graph and then call of_find_possible_crtcs() to figure out your links. Unfortunately that doesn't work with the design of the DPU driver, because the crtcs doesn't represent the INTFs - and as you say, the existing of_graphs are full of incorrect data. Which also means that I don't know why we keep filling out the of_graph, because afaict it's not used and it contains invalid information. Thanks, Bjorn
Hi Bjorn and Stephen On 2021-10-06 13:39, Bjorn Andersson wrote: > On Wed 06 Oct 11:59 PDT 2021, Stephen Boyd wrote: > >> Quoting Bjorn Andersson (2021-10-06 11:05:09) >> > On Wed 06 Oct 10:19 PDT 2021, Stephen Boyd wrote: >> > >> > > Quoting Bjorn Andersson (2021-10-06 10:07:17) >> > > > On Tue 05 Oct 21:26 PDT 2021, Stephen Boyd wrote: >> > > > >> > > > > Quoting Bjorn Andersson (2021-10-05 19:37:52) >> > > > > > On Tue 05 Oct 19:06 PDT 2021, Stephen Boyd wrote: >> > > > > > >> > > > > > > Quoting Bjorn Andersson (2021-10-05 18:43:16) >> > > > > > > > On Tue 05 Oct 17:43 PDT 2021, Stephen Boyd wrote: >> > > > > > > > >> > > > > > > > > Quoting Bjorn Andersson (2021-10-05 16:13:21) >> > > > > > > > > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c >> > > > > > > > > > index bdaf227f05dc..674cddfee5b0 100644 >> > > > > > > > > > --- a/drivers/gpu/drm/msm/dp/dp_display.c >> > > > > > > > > > +++ b/drivers/gpu/drm/msm/dp/dp_display.c >> > > > > > > > > > @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) >> > > > > > > > > > if (!dp) >> > > > > > > > > > return -ENOMEM; >> > > > > > > > > > >> > > > > > > > > > - desc = dp_display_get_desc(pdev); >> > > > > > > > > > + desc = dp_display_get_desc(pdev, &dp->id); >> > > > > > > > > >> > > > > > > > > I'm sad that dp->id has to match the number in the SoC specific >> > > > > > > > > dpu_intf_cfg array in drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c >> > > > > > > > > still. Is there any way we can avoid that? Also, notice how those arrays >> > > > > > > > > already have INTF_DP macros, which makes me think that it may be better >> > > > > > > > > to connect this to those arrays instead of making an msm_dp_desc >> > > > > > > > > structure and then make sure the 'type' member matches a connector >> > > > > > > > > type number. Otherwise this code is super fragile. >> > > > > > > > > >> > > > > > > > >> > > > > > > > I'm afraid I don't understand what you're proposing. Or which part you >> > > > > > > > consider fragile, the indices of the INTF_DP instances aren't going to >> > > > > > > > move around... >> > > > > > > > >> > > > > > > > I have N instances of the DP driver that I need to match to N entries >> > > > > > > > from the platform specific intf array, I need some stable reference >> > > > > > > > between them. When I started this journey I figured I could rely on the >> > > > > > > > of_graph between the DPU and the interface controllers, but the values >> > > > > > > > used there today are just bogus, so that was a no go. >> > > > > > > > >> > > > > > > > We can use whatever, as long as _dpu_kms_initialize_displayport() can >> > > > > > > > come up with an identifier to put in h_tile_instance[0] so that >> > > > > > > > dpu_encoder_setup_display() can find the relevant INTF. >> > > > > > > > >> > > > > > > >> > > > > > > To make it more concrete we can look at sc7180 >> > > > > > > >> > > > > > > static const struct dpu_intf_cfg sc7180_intf[] = { >> > > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, >> > > > > > > INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25), >> > > > > > > ^ >> > > > > > > | >> > > > > > > >> > > > > > > intf0 is irrelevant. Also the address is irrelevant. But here we have a >> > > > > > > zero, the number after INTF_DP, and that is very relevant. That number >> > > > > > > needs to match the dp->id. Somewhere we have a match between >> > > > > > > controller_id and dp->id in the code. >> > > > > > >> > > > > > That number (the 0, not INTF_0) is what the code matches against dp->id >> > > > > > in _dpu_kms_initialize_displayport(), in order to figure out that this >> > > > > > is INTF_0 in dpu_encoder_setup_display(). >> > > > > > >> > > > > > I.e. look at the sc8180x patch: >> > > > > > >> > > > > > INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25), >> > > > > > INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 26, 27), >> > > > > > INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 28, 29), >> > > > > > /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until this is supported */ >> > > > > > INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31), >> > > > > > INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21), >> > > > > > INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23), >> > > > > > >> > > > > > Where the DP driver defines the 3 controllers with dp->id of 0, 1 and 2, >> > > > > > which the DPU code will match against to INTF_0, INTF_4 and INTF_5. >> > > > > > >> > > > > >> > > > > Yep. I'm saying that having to make that number in this intf array match >> > > > > the order of the register mapping descriptor array is fragile. Why can't >> > > > > we indicate the interface is DP or eDP with INTF_DP or INTF_EDP and then >> > > > > map from the descriptor array to this intf array somehow so that the >> > > > > order of the descriptor array doesn't matter? Then we don't have to put >> > > > > the connector type in the descriptor array, and we don't have to keep >> > > > > the order of the array a certain way to match this intf descriptor. >> > > > > >> > > > > Maybe >> > > > > >> > > > > struct msm_dp_desc { >> > > > > phys_addr_t io_start; >> > > > > unsigned int id; >> > > > >> > > > The INTF_<N> constants are a property of the DPU driver and not >> > > > available in the DP driver and the msm_dp struct is a property of the DP >> > > > driver and can't be dereferenced in the DPU driver. >> > > > >> > > > The proposed way around this is that the descs array defines the order >> > > > in priv->dp[N] and this N is used as controller_id. >> > > >> > > I'm pretty sure I'm following along. >> > > >> > > > >> > > > So the only thing that I don't find straight forward here is that the >> > > > eDP controller is considered just a DP controller, so you have to use >> > > > INTF_DP, <N> for that, and not just INTF_EDP, 0. >> > > > >> > > > > }; >> > > > > >> > > > > and then have msm_dp_desc::id equal INTF_<N> and then look through the >> > > > > intf from DPU here in the DP driver to find the id and type of connector >> > > > > that should be used by default? Still sort of fragile because the only >> > > > > connection is an unsigned int which isn't great, but at least it's >> > > > > explicit instead of implicit based on the array order. >> > > > >> > > > No matter how I look at this, you need to put some number somewhere here >> > > > that will be used to match up the INTF with the right DSI/DP encoder. >> > > >> > > Correct. >> > > >> > > > >> > > > Using the proposed number scheme follows the numbering of all the DP >> > > > controllers from the documentation. >> > > > >> > > >> > > Maybe I can make a better example. I have this for sc7280 in dpu_hw_catalog.c: >> > > >> > > static const struct dpu_intf_cfg sc7280_intf[] = { >> > > INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, CONTROLLER_ID_A, 24, >> > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 24, 25), >> > > INTF_BLK("intf_1", INTF_1, 0x35000, INTF_DSI, 0, 24, >> > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 26, 27), >> > > INTF_BLK("intf_5", INTF_5, 0x39000, INTF_DP, CONTROLLER_ID_B, 24, >> > > INTF_SC7280_MASK, MDP_SSPP_TOP0_INTR, 22, 23), >> > > }; >> > > >> > > And then this array for sc7280 in dp_display.c: >> > > >> > > static const struct msm_dp_desc sc7280_dp_cfg = { >> > > .desc = { >> > > [CONTROLLER_ID_A] = { 0xaea0000, DRM_MODE_CONNECTOR_eDP }, >> > > [CONTROLLER_ID_B] = { 0xae90000, DRM_MODE_CONNECTOR_DisplayPort }, >> > > }, >> > > .num_dp = 2, >> > > }; >> > > >> > > So these two arrays must match based on CONTROLLER_ID_{A,B}. I don't >> > > like having to make these two numbers match so if it was explicit, even >> > > possibly by having a bunch of macros put in both places then I would be >> > > happy. I spent a few hours when I messed up the order of the >> > > sc7280_dp_cfg.desc array trying to figure out why things weren't >> > > working. >> > >> > So essentially, you didn't know that the controller_id has to match the >> > index in priv->dsi[] and priv->dp[] and providing a define for them >> > would make this more obvious? >> >> Now you got it! >> >> > >> > I think per your argument the 0 following INTF_DSI should also be using >> > this scheme, so we'd have multiple CONTROLLER_ID_A, which probably is >> > confusing as well. >> >> Agreed. >> >> > >> > I tried it out with below patch; it documents the relationship, provides >> > constants for the magic 2 and 3 for number of DSI and DP controllers in >> > struct msm_drm_private. >> > >> > I like it. >> >> Thanks. I prefer this approach as well. > > Sweet, I'll update my patch set accordingly. Yes, I also agree with this approach to better document the relationship between the hw_catalog array and the dp_display msm_dp_desc > >> I can see now why qcom always wants to change the output ports on the >> DPU node in DT to match the INTF number. If they would have described >> this problem it may have made sense to have the graph endpoints with >> reg properties matching the interface number in the intf array. Sigh. > > Yes, I think the supposed design is that you should use the of_graph > and > then call of_find_possible_crtcs() to figure out your links. > > Unfortunately that doesn't work with the design of the DPU driver, > because the crtcs doesn't represent the INTFs - and as you say, the > existing of_graphs are full of incorrect data. > > Which also means that I don't know why we keep filling out the > of_graph, > because afaict it's not used and it contains invalid information. > > Thanks, > Bjorn
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index b7f33da2799c..9cd9539a1504 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2173,7 +2173,7 @@ int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, dpu_encoder_vsync_event_handler, 0); else if (disp_info->intf_type == DRM_MODE_ENCODER_TMDS) - dpu_enc->dp = priv->dp; + dpu_enc->dp = priv->dp[disp_info->h_tile_instance[0]]; INIT_DELAYED_WORK(&dpu_enc->delayed_off_work, dpu_encoder_off_work); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index f655adbc2421..875b07e7183d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -188,6 +188,7 @@ static int dpu_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor) struct dentry *entry; struct drm_device *dev; struct msm_drm_private *priv; + int i; if (!p) return -EINVAL; @@ -203,8 +204,10 @@ static int dpu_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor) dpu_debugfs_vbif_init(dpu_kms, entry); dpu_debugfs_core_irq_init(dpu_kms, entry); - if (priv->dp) - msm_dp_debugfs_init(priv->dp, minor); + for (i = 0; i < ARRAY_SIZE(priv->dp); i++) { + if (priv->dp[i]) + msm_dp_debugfs_init(priv->dp[i], minor); + } return dpu_core_perf_debugfs_init(dpu_kms, entry); } @@ -544,35 +547,42 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev, { struct drm_encoder *encoder = NULL; struct msm_display_info info; - int rc = 0; + int rc; + int i; - if (!priv->dp) - return rc; + for (i = 0; i < ARRAY_SIZE(priv->dp); i++) { + if (!priv->dp[i]) + continue; - encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_TMDS); - if (IS_ERR(encoder)) { - DPU_ERROR("encoder init failed for dsi display\n"); - return PTR_ERR(encoder); - } + encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_TMDS); + if (IS_ERR(encoder)) { + DPU_ERROR("encoder init failed for dsi display\n"); + return PTR_ERR(encoder); + } - memset(&info, 0, sizeof(info)); - rc = msm_dp_modeset_init(priv->dp, dev, encoder); - if (rc) { - DPU_ERROR("modeset_init failed for DP, rc = %d\n", rc); - drm_encoder_cleanup(encoder); - return rc; - } + memset(&info, 0, sizeof(info)); + rc = msm_dp_modeset_init(priv->dp[i], dev, encoder); + if (rc) { + DPU_ERROR("modeset_init failed for DP, rc = %d\n", rc); + drm_encoder_cleanup(encoder); + return rc; + } - priv->encoders[priv->num_encoders++] = encoder; + priv->encoders[priv->num_encoders++] = encoder; - info.num_of_h_tiles = 1; - info.capabilities = MSM_DISPLAY_CAP_VID_MODE; - info.intf_type = encoder->encoder_type; - rc = dpu_encoder_setup(dev, encoder, &info); - if (rc) - DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", - encoder->base.id, rc); - return rc; + info.num_of_h_tiles = 1; + info.h_tile_instance[0] = i; + info.capabilities = MSM_DISPLAY_CAP_VID_MODE; + info.intf_type = encoder->encoder_type; + rc = dpu_encoder_setup(dev, encoder, &info); + if (rc) { + DPU_ERROR("failed to setup DPU encoder %d: rc:%d\n", + encoder->base.id, rc); + return rc; + } + } + + return 0; } /** @@ -792,6 +802,7 @@ static int dpu_irq_postinstall(struct msm_kms *kms) { struct msm_drm_private *priv; struct dpu_kms *dpu_kms = to_dpu_kms(kms); + int i; if (!dpu_kms || !dpu_kms->dev) return -EINVAL; @@ -800,7 +811,8 @@ static int dpu_irq_postinstall(struct msm_kms *kms) if (!priv) return -EINVAL; - msm_dp_irq_postinstall(priv->dp); + for (i = 0; i < ARRAY_SIZE(priv->dp); i++) + msm_dp_irq_postinstall(priv->dp[i]); return 0; } diff --git a/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c b/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c index cabe15190ec1..2e1acb1bc390 100644 --- a/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c +++ b/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c @@ -126,8 +126,12 @@ void msm_disp_snapshot_capture_state(struct msm_disp_state *disp_state) priv = drm_dev->dev_private; kms = priv->kms; - if (priv->dp) - msm_dp_snapshot(disp_state, priv->dp); + for (i = 0; i < ARRAY_SIZE(priv->dp); i++) { + if (!priv->dp[i]) + continue; + + msm_dp_snapshot(disp_state, priv->dp[i]); + } for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) { if (!priv->dsi[i]) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index bdaf227f05dc..674cddfee5b0 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -79,6 +79,8 @@ struct dp_display_private { char *name; int irq; + unsigned int id; + /* state variables */ bool core_initialized; bool hpd_irq_on; @@ -229,7 +231,7 @@ static int dp_display_bind(struct device *dev, struct device *master, dp->dp_display.drm_dev = drm; priv = drm->dev_private; - priv->dp = &(dp->dp_display); + priv->dp[dp->id] = &(dp->dp_display); rc = dp->parser->parse(dp->parser, dp->dp_display.connector_type); if (rc) { @@ -269,7 +271,7 @@ static void dp_display_unbind(struct device *dev, struct device *master, dp_power_client_deinit(dp->power); dp_aux_unregister(dp->aux); - priv->dp = NULL; + priv->dp[dp->id] = NULL; } static const struct component_ops dp_display_comp_ops = { @@ -1200,7 +1202,8 @@ int dp_display_request_irq(struct msm_dp *dp_display) return 0; } -static struct msm_dp_desc *dp_display_get_desc(struct platform_device *pdev) +static struct msm_dp_desc *dp_display_get_desc(struct platform_device *pdev, + unsigned int *id) { const struct msm_dp_config *cfg = of_device_get_match_data(&pdev->dev); struct resource *res; @@ -1210,9 +1213,12 @@ static struct msm_dp_desc *dp_display_get_desc(struct platform_device *pdev) if (!res) return NULL; - for (i = 0; i < cfg->num_descs; i++) - if (cfg->descs[i].io_start == res->start) + for (i = 0; i < cfg->num_descs; i++) { + if (cfg->descs[i].io_start == res->start) { + *id = i; return &cfg->descs[i]; + } + } dev_err(&pdev->dev, "unknown displayport instance\n"); return NULL; @@ -1233,7 +1239,7 @@ static int dp_display_probe(struct platform_device *pdev) if (!dp) return -ENOMEM; - desc = dp_display_get_desc(pdev); + desc = dp_display_get_desc(pdev, &dp->id); if (!desc) return -EINVAL; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 8b005d1ac899..2e84dc30e12e 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -161,7 +161,7 @@ struct msm_drm_private { /* DSI is shared by mdp4 and mdp5 */ struct msm_dsi *dsi[2]; - struct msm_dp *dp; + struct msm_dp *dp[3]; /* when we have more than one 'msm_gpu' these need to be an array: */ struct msm_gpu *gpu;
Based on the removal of the g_dp_display and the movement of the priv->dp lookup into the DP code it's now possible to have multiple DP instances. In line with the other controllers in the MSM driver, introduce a per-compatible list of base addresses which is used to resolve the "instance id" for the given DP controller. This instance id is used as index in the priv->dp[] array. Then extend the initialization code to initialize struct drm_encoder for each of the registered priv->dp[] and update the logic for associating each struct msm_dp with the struct dpu_encoder_virt. Lastly, bump the number of struct msm_dp instances carries by priv->dp to 3, the currently known maximum number of controllers found in a Qualcomm SoC. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- Changes since v3: - Rebased ontop of previous patches drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 66 +++++++++++-------- .../gpu/drm/msm/disp/msm_disp_snapshot_util.c | 8 ++- drivers/gpu/drm/msm/dp/dp_display.c | 18 +++-- drivers/gpu/drm/msm/msm_drv.h | 2 +- 5 files changed, 59 insertions(+), 37 deletions(-) -- 2.29.2