diff mbox series

[2/2] drm/msm/dpu: add dpu_plane_atomic_print_state

Message ID 20211215160912.2715956-2-dmitry.baryshkov@linaro.org
State Accepted
Commit 8ecfef96cdcd857d4866fc91e5ed05d97946285f
Headers show
Series [1/2] drm/msm/dpu: add dpu_crtc_atomic_print_state | expand

Commit Message

Dmitry Baryshkov Dec. 15, 2021, 4:09 p.m. UTC
Implement plane's atomic_print_state() callback, printing DPU-specific
plane state: blending stage, SSPP and multirect mode and index.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 41 +++++++++++++++++++++++
 1 file changed, 41 insertions(+)

Comments

Stephen Boyd Dec. 15, 2021, 7:32 p.m. UTC | #1
Quoting Dmitry Baryshkov (2021-12-15 08:09:12)
> Implement plane's atomic_print_state() callback, printing DPU-specific
> plane state: blending stage, SSPP and multirect mode and index.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---

Same const comment applies here

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Abhinav Kumar Dec. 16, 2021, 1:13 a.m. UTC | #2
On 12/15/2021 8:09 AM, Dmitry Baryshkov wrote:
> Implement plane's atomic_print_state() callback, printing DPU-specific
> plane state: blending stage, SSPP and multirect mode and index.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 41 +++++++++++++++++++++++
>   1 file changed, 41 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index fe2f8221ab6e..bdecbe39a12b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -1305,6 +1305,46 @@ dpu_plane_duplicate_state(struct drm_plane *plane)
>   	return &pstate->base;
>   }
>   
> +static const char * const multirect_mode_name[] = {
> +	[DPU_SSPP_MULTIRECT_NONE] = "none",
> +	[DPU_SSPP_MULTIRECT_PARALLEL] = "parallel",
> +	[DPU_SSPP_MULTIRECT_TIME_MX] = "time_mx",
> +};
> +
> +static const char * const multirect_index_name[] = {
> +	[DPU_SSPP_RECT_SOLO] = "solo",
> +	[DPU_SSPP_RECT_0] = "rect_0",
> +	[DPU_SSPP_RECT_1] = "rect_1",
> +};
> +
> +static const char *dpu_get_multirect_mode(enum dpu_sspp_multirect_mode mode)
> +{
> +	if (WARN_ON(mode >= ARRAY_SIZE(multirect_mode_name)))
> +		return "unknown";
> +
> +	return multirect_mode_name[mode];
> +}
> +
> +static const char *dpu_get_multirect_index(enum dpu_sspp_multirect_index index)
> +{
> +	if (WARN_ON(index >= ARRAY_SIZE(multirect_index_name)))
> +		return "unknown";
> +
> +	return multirect_index_name[index];
> +}
> +
> +static void dpu_plane_atomic_print_state(struct drm_printer *p,
> +		const struct drm_plane_state *state)
> +{
> +	struct dpu_plane_state *pstate = to_dpu_plane_state(state);
> +	struct dpu_plane *pdpu = to_dpu_plane(state->plane);
> +
> +	drm_printf(p, "\tstage=%d\n", pstate->stage);
> +	drm_printf(p, "\tsspp=%s\n", pdpu->pipe_hw->cap->name);
> +	drm_printf(p, "\tmultirect_mode=%s\n", dpu_get_multirect_mode(pstate->multirect_mode));
> +	drm_printf(p, "\tmultirect_index=%s\n", dpu_get_multirect_index(pstate->multirect_index));
> +}
> +
>   static void dpu_plane_reset(struct drm_plane *plane)
>   {
>   	struct dpu_plane *pdpu;
> @@ -1388,6 +1428,7 @@ static const struct drm_plane_funcs dpu_plane_funcs = {
>   		.reset = dpu_plane_reset,
>   		.atomic_duplicate_state = dpu_plane_duplicate_state,
>   		.atomic_destroy_state = dpu_plane_destroy_state,
> +		.atomic_print_state = dpu_plane_atomic_print_state,
>   		.format_mod_supported = dpu_plane_format_mod_supported,
>   };
>   
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index fe2f8221ab6e..bdecbe39a12b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -1305,6 +1305,46 @@  dpu_plane_duplicate_state(struct drm_plane *plane)
 	return &pstate->base;
 }
 
+static const char * const multirect_mode_name[] = {
+	[DPU_SSPP_MULTIRECT_NONE] = "none",
+	[DPU_SSPP_MULTIRECT_PARALLEL] = "parallel",
+	[DPU_SSPP_MULTIRECT_TIME_MX] = "time_mx",
+};
+
+static const char * const multirect_index_name[] = {
+	[DPU_SSPP_RECT_SOLO] = "solo",
+	[DPU_SSPP_RECT_0] = "rect_0",
+	[DPU_SSPP_RECT_1] = "rect_1",
+};
+
+static const char *dpu_get_multirect_mode(enum dpu_sspp_multirect_mode mode)
+{
+	if (WARN_ON(mode >= ARRAY_SIZE(multirect_mode_name)))
+		return "unknown";
+
+	return multirect_mode_name[mode];
+}
+
+static const char *dpu_get_multirect_index(enum dpu_sspp_multirect_index index)
+{
+	if (WARN_ON(index >= ARRAY_SIZE(multirect_index_name)))
+		return "unknown";
+
+	return multirect_index_name[index];
+}
+
+static void dpu_plane_atomic_print_state(struct drm_printer *p,
+		const struct drm_plane_state *state)
+{
+	struct dpu_plane_state *pstate = to_dpu_plane_state(state);
+	struct dpu_plane *pdpu = to_dpu_plane(state->plane);
+
+	drm_printf(p, "\tstage=%d\n", pstate->stage);
+	drm_printf(p, "\tsspp=%s\n", pdpu->pipe_hw->cap->name);
+	drm_printf(p, "\tmultirect_mode=%s\n", dpu_get_multirect_mode(pstate->multirect_mode));
+	drm_printf(p, "\tmultirect_index=%s\n", dpu_get_multirect_index(pstate->multirect_index));
+}
+
 static void dpu_plane_reset(struct drm_plane *plane)
 {
 	struct dpu_plane *pdpu;
@@ -1388,6 +1428,7 @@  static const struct drm_plane_funcs dpu_plane_funcs = {
 		.reset = dpu_plane_reset,
 		.atomic_duplicate_state = dpu_plane_duplicate_state,
 		.atomic_destroy_state = dpu_plane_destroy_state,
+		.atomic_print_state = dpu_plane_atomic_print_state,
 		.format_mod_supported = dpu_plane_format_mod_supported,
 };