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[209.132.180.67]) by mx.google.com with ESMTP id cj2si193569pdb.187.2015.08.19.02.38.49; Wed, 19 Aug 2015 02:38:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751299AbbHSJig (ORCPT + 8 others); Wed, 19 Aug 2015 05:38:36 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:36136 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932135AbbHSJie (ORCPT ); Wed, 19 Aug 2015 05:38:34 -0400 Received: by pawq9 with SMTP id q9so57249008paw.3 for ; Wed, 19 Aug 2015 02:38:33 -0700 (PDT) X-Received: by 10.68.131.106 with SMTP id ol10mr23243814pbb.94.1439977113498; Wed, 19 Aug 2015 02:38:33 -0700 (PDT) Received: from localhost.localdomain ([116.251.214.16]) by smtp.gmail.com with ESMTPSA id fa1sm157600pab.37.2015.08.19.02.38.26 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Aug 2015 02:38:32 -0700 (PDT) From: Leo Yan To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Jassi Brar , Bintian Wang , Haojian Zhuang , Yiping Xu , Wei Xu , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, guodong.xu@linaro.org, Jian Zhang , Zhenwei Wang , Haoju Mo , Dan Zhao , kongfei@hisilicon.com, Guangyue Zeng Cc: Leo Yan Subject: [PATCH v1 3/3] arm64: dts: add Hi6220 mailbox node Date: Wed, 19 Aug 2015 17:37:35 +0800 Message-Id: <1439977055-1747-4-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1439977055-1747-1-git-send-email-leo.yan@linaro.org> References: <1439977055-1747-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: leo.yan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On Hi6220, below memory regions in DDR have specific purpose: 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime; 0x0740,f000 - 0x0740,ffff: For MCU firmware's section; 0x06df,f000 - 0x06df,ffff: For mailbox message data. This patch reserves these memory regions and add device node for mailbox in dts. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 20 +++++++++++++++++--- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e36a539..d5470d3 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -7,9 +7,6 @@ /dts-v1/; -/*Reserved 1MB memory for MCU*/ -/memreserve/ 0x05e00000 0x00100000; - #include "hi6220.dtsi" / { @@ -28,4 +25,21 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x40000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + mcu-buf@05e00000 { + no-map; + reg = <0x0 0x05e00000 0x0 0x00100000>, /* MCU firmware buffer */ + <0x0 0x0740f000 0x0 0x00001000>; /* MCU firmware section */ + }; + + mbox-buf@06dff000 { + no-map; + reg = <0x0 0x06dff000 0x0 0x00001000>; /* Mailbox message buf */ + }; + }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3f03380..9ff25bc 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -167,5 +167,13 @@ clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; clock-names = "uartclk", "apb_pclk"; }; + + mailbox: mailbox@f7510000 { + #mbox-cells = <1>; + compatible = "hisilicon,hi6220-mbox"; + reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */ + <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */ + interrupts = ; + }; }; };