Message ID | 20220118004434.17095-2-ansuelsmth@gmail.com |
---|---|
State | New |
Headers | show |
Series | Multiple addition and improvement to ipq8064 gcc | expand |
On Tue, 18 Jan 2022 01:44:21 +0100, Ansuel Smith wrote: > Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source > clocks. The gcc node is also used by the tsens driver, already Documented, > to get the calib nvmem cells and the base reg from gcc. > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > .../bindings/clock/qcom,gcc-ipq8064.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.example.dt.yaml: clock-controller@900000: compatible: ['qcom,gcc-ipq8064', 'syscon'] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.example.dt.yaml: clock-controller@900000: compatible: Additional items are not allowed ('syscon' was unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.example.dt.yaml: clock-controller@900000: 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.example.dt.yaml: clock-controller@900000: compatible: ['qcom,gcc-ipq8064', 'syscon'] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.example.dt.yaml: clock-controller@900000: compatible: Additional items are not allowed ('syscon' was unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1581028 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Tue, Jan 18, 2022 at 01:44:21AM +0100, Ansuel Smith wrote: > Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source > clocks. The gcc node is also used by the tsens driver, already Documented, > to get the calib nvmem cells and the base reg from gcc. > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > .../bindings/clock/qcom,gcc-ipq8064.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > new file mode 100644 > index 000000000000..2dc254fdf161 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064 > + > +maintainers: > + - Ansuel Smith <ansuelsmth@gmail.com> > + > +description: | > + Qualcomm global clock control module which supports the clocks, resets and > + power domains on IPQ8064. > + > +properties: > + compatible: > + const: qcom,gcc-ipq8064 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: PXO source > + - description: CX0 source > + > + clock-names: > + items: > + - const: pxo > + - const: cxo > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + - '#reset-cells' > + - '#power-domain-cells' > + - clocks > + - clock-names > + > +additionalProperties: true Must be 'false'. True is only for incomplete schemas included by other schemas. > + > +examples: > + - | > + gcc: clock-controller@900000 { > + compatible = "qcom,gcc-ipq8064", "syscon"; > + reg = <0x00900000 0x4000>; > + clocks = <&pxo_board>, <&cxo_board>; > + clock-names = "pxo", "cxo"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + > + /* Tsens node definition */ You need to define child nodes. > + > + }; > +... > -- > 2.33.1 > >
On Wed, Jan 19, 2022 at 07:59:03AM -0600, Rob Herring wrote: > On Tue, Jan 18, 2022 at 01:44:21AM +0100, Ansuel Smith wrote: > > Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source > > clocks. The gcc node is also used by the tsens driver, already Documented, > > to get the calib nvmem cells and the base reg from gcc. > > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > > --- > > .../bindings/clock/qcom,gcc-ipq8064.yaml | 67 +++++++++++++++++++ > > 1 file changed, 67 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > > new file mode 100644 > > index 000000000000..2dc254fdf161 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > > @@ -0,0 +1,67 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064 > > + > > +maintainers: > > + - Ansuel Smith <ansuelsmth@gmail.com> > > + > > +description: | > > + Qualcomm global clock control module which supports the clocks, resets and > > + power domains on IPQ8064. > > + > > +properties: > > + compatible: > > + const: qcom,gcc-ipq8064 > > + > > + '#clock-cells': > > + const: 1 > > + > > + '#reset-cells': > > + const: 1 > > + > > + '#power-domain-cells': > > + const: 1 > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: PXO source > > + - description: CX0 source > > + > > + clock-names: > > + items: > > + - const: pxo > > + - const: cxo > > + > > +required: > > + - compatible > > + - reg > > + - '#clock-cells' > > + - '#reset-cells' > > + - '#power-domain-cells' > > + - clocks > > + - clock-names > > + > > +additionalProperties: true > > Must be 'false'. True is only for incomplete schemas included by other > schemas. > > > + > > +examples: > > + - | > > + gcc: clock-controller@900000 { > > + compatible = "qcom,gcc-ipq8064", "syscon"; > > + reg = <0x00900000 0x4000>; > > + clocks = <&pxo_board>, <&cxo_board>; > > + clock-names = "pxo", "cxo"; > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + #power-domain-cells = <1>; > > + > > + /* Tsens node definition */ > > You need to define child nodes. > Is it correct to put in the example the tsens node Documented in another file? Or should I just remove the comment? > > + > > + }; > > +... > > -- > > 2.33.1 > > > >
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml new file mode 100644 index 000000000000..2dc254fdf161 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064 + +maintainers: + - Ansuel Smith <ansuelsmth@gmail.com> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on IPQ8064. + +properties: + compatible: + const: qcom,gcc-ipq8064 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + items: + - description: PXO source + - description: CX0 source + + clock-names: + items: + - const: pxo + - const: cxo + +required: + - compatible + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + - clocks + - clock-names + +additionalProperties: true + +examples: + - | + gcc: clock-controller@900000 { + compatible = "qcom,gcc-ipq8064", "syscon"; + reg = <0x00900000 0x4000>; + clocks = <&pxo_board>, <&cxo_board>; + clock-names = "pxo", "cxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + + /* Tsens node definition */ + + }; +...
Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source clocks. The gcc node is also used by the tsens driver, already Documented, to get the calib nvmem cells and the base reg from gcc. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- .../bindings/clock/qcom,gcc-ipq8064.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml