KVM: x86: remove PMU FIXED_CTR3 from msrs_to_save_all

From: Wei Wang <wei.w.wang@intel.com>

[ upstream commit 9fb12fe5b93b94b9e607509ba461e17f4cc6a264 ]

The fixed counter 3 is used for the Topdown metrics, which hasn't been
enabled for KVM guests. Userspace accessing to it will fail as it's not
included in get_fixed_pmc(). This breaks KVM selftests on ICX+ machines,
which have this counter.

To reproduce it on ICX+ machines, ./state_test reports:
==== Test Assertion Failure ====
lib/x86_64/processor.c:1078: r == nmsrs
pid=4564 tid=4564 - Argument list too long
1  0x000000000040b1b9: vcpu_save_state at processor.c:1077
2  0x0000000000402478: main at state_test.c:209 (discriminator 6)
3  0x00007fbe21ed5f92: ?? ??:0
4  0x000000000040264d: _start at ??:?
 Unexpected result from KVM_GET_MSRS, r: 17 (failed MSR was 0x30c)

With this patch, it works well.

Signed-off-by: Wei Wang <wei.w.wang@intel.com>
Message-Id: <20211217124934.32893-1-wei.w.wang@intel.com>
Fixes: e2ada66ec418 ("kvm: x86: Add Intel PMU MSRs to msrs_to_save[]")
Cc: stable@vger.kernel.org # 5.4.x
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/kvm/x86.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

On Tue, Jan 18, 2022 at 04:11:07AM -0500, Paolo Bonzini wrote:
> From: Wei Wang <wei.w.wang@intel.com>
> 
> [ upstream commit 9fb12fe5b93b94b9e607509ba461e17f4cc6a264 ]
> 
> The fixed counter 3 is used for the Topdown metrics, which hasn't been
> enabled for KVM guests. Userspace accessing to it will fail as it's not
> included in get_fixed_pmc(). This breaks KVM selftests on ICX+ machines,
> which have this counter.
> 
> To reproduce it on ICX+ machines, ./state_test reports:
> ==== Test Assertion Failure ====
> lib/x86_64/processor.c:1078: r == nmsrs
> pid=4564 tid=4564 - Argument list too long
> 1  0x000000000040b1b9: vcpu_save_state at processor.c:1077
> 2  0x0000000000402478: main at state_test.c:209 (discriminator 6)
> 3  0x00007fbe21ed5f92: ?? ??:0
> 4  0x000000000040264d: _start at ??:?
>  Unexpected result from KVM_GET_MSRS, r: 17 (failed MSR was 0x30c)
> 
> With this patch, it works well.
> 
> Signed-off-by: Wei Wang <wei.w.wang@intel.com>
> Message-Id: <20211217124934.32893-1-wei.w.wang@intel.com>
> Fixes: e2ada66ec418 ("kvm: x86: Add Intel PMU MSRs to msrs_to_save[]")
> Cc: stable@vger.kernel.org # 5.4.x
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  arch/x86/kvm/x86.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 9a2972fdae82..d490b83d640c 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -1331,7 +1331,7 @@ static const u32 msrs_to_save_all[] = {
>  	MSR_IA32_UMWAIT_CONTROL,
>  
>  	MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
> -	MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
> +	MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
>  	MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
>  	MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
>  	MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
> -- 
> 2.31.1
> 

Now queued up, thanks.

greg k-h