diff mbox series

[v3,8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select

Message ID 20220119230626.31560-9-terry.bowman@amd.com
State Superseded
Headers show
Series i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses | expand

Commit Message

Terry Bowman Jan. 19, 2022, 11:06 p.m. UTC
AMD processors include registers capable of selecting between 2 SMBus
ports. Port selection is made during each user access by writing to
FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
SMBus port selection because cd6h/cd7h port I/O is not available on
later AMD processors.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
---
 drivers/i2c/busses/i2c-piix4.c | 25 +++++++++++++++++--------
 1 file changed, 17 insertions(+), 8 deletions(-)

Comments

Andy Shevchenko Jan. 20, 2022, 11:28 a.m. UTC | #1
On Thu, Jan 20, 2022 at 1:08 AM Terry Bowman <terry.bowman@amd.com> wrote:
>
> AMD processors include registers capable of selecting between 2 SMBus
> ports. Port selection is made during each user access by writing to
> FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
> SMBus port selection because cd6h/cd7h port I/O is not available on
> later AMD processors.

...

>  }
> +
>  /*

Stray change.
Terry Bowman Jan. 20, 2022, 2 p.m. UTC | #2
On 1/20/22 5:28 AM, Andy Shevchenko wrote:
> On Thu, Jan 20, 2022 at 1:08 AM Terry Bowman <terry.bowman@amd.com> wrote:
>>
>> AMD processors include registers capable of selecting between 2 SMBus
>> ports. Port selection is made during each user access by writing to
>> FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
>> SMBus port selection because cd6h/cd7h port I/O is not available on
>> later AMD processors.
> 
> ...
> 
>>  }
>> +
>>  /*
> 
> Stray change.
> 
> 

I'll remove it.
Terry Bowman Jan. 21, 2022, 9:02 p.m. UTC | #3
On 1/20/22 05:28, Andy Shevchenko wrote:
> On Thu, Jan 20, 2022 at 1:08 AM Terry Bowman <terry.bowman@amd.com> wrote:
>>
>> AMD processors include registers capable of selecting between 2 SMBus
>> ports. Port selection is made during each user access by writing to
>> FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
>> SMBus port selection because cd6h/cd7h port I/O is not available on
>> later AMD processors.
> 
> ...
> 
>>  }
>> +
>>  /*
> 
> Stray change.
> 
> 

Hi Andy,

Looking at this closer I find the added line separates the closing 
function brace from the next function's comment header. Are you sure I 
need to remove this line?

Regards,
Terry
Wolfram Sang Jan. 21, 2022, 9:07 p.m. UTC | #4
> Looking at this closer I find the added line separates the closing 
> function brace from the next function's comment header. Are you sure I 
> need to remove this line?

I agree you can leave it.
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index b85f926451b8..1811bdc96363 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -755,19 +755,28 @@  static void piix4_imc_wakeup(void)
 	release_region(KERNCZ_IMC_IDX, 2);
 }
 
-static int piix4_sb800_port_sel(u8 port)
+static int piix4_sb800_port_sel(u8 port, struct sb800_mmio_cfg *mmio_cfg)
 {
 	u8 smba_en_lo;
 
-	outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX);
-	smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
+	if (mmio_cfg->use_mmio) {
+		smba_en_lo = ioread8(mmio_cfg->addr + piix4_port_sel_sb800);
+
+		if ((smba_en_lo & piix4_port_mask_sb800) != port)
+			iowrite8((smba_en_lo & ~piix4_port_mask_sb800) | port,
+				 mmio_cfg->addr + piix4_port_sel_sb800);
+	} else {
+		outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX);
+		smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
 
-	if ((smba_en_lo & piix4_port_mask_sb800) != port)
-		outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port,
-		       SB800_PIIX4_SMB_IDX + 1);
+		if ((smba_en_lo & piix4_port_mask_sb800) != port)
+			outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port,
+			       SB800_PIIX4_SMB_IDX + 1);
+	}
 
 	return (smba_en_lo & piix4_port_mask_sb800);
 }
+
 /*
  * Handles access to multiple SMBus ports on the SB800.
  * The port is selected by bits 2:1 of the smb_en register (0x2c).
@@ -844,12 +853,12 @@  static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
 		}
 	}
 
-	prev_port = piix4_sb800_port_sel(adapdata->port);
+	prev_port = piix4_sb800_port_sel(adapdata->port, &adapdata->mmio_cfg);
 
 	retval = piix4_access(adap, addr, flags, read_write,
 			      command, size, data);
 
-	piix4_sb800_port_sel(prev_port);
+	piix4_sb800_port_sel(prev_port, &adapdata->mmio_cfg);
 
 	/* Release the semaphore */
 	outb_p(smbslvcnt | 0x20, SMBSLVCNT);