diff mbox series

[RFC,1/3] dt-bindings: iommu: Add bindings for samsung,sysmmu-v8

Message ID 20220120201958.2649-2-semen.protsenko@linaro.org
State New
Headers show
Series iommu/samsung: Introduce Exynos sysmmu-v8 driver | expand

Commit Message

Sam Protsenko Jan. 20, 2022, 8:19 p.m. UTC 
Only example of usage and header for now.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
 .../bindings/iommu/samsung,sysmmu-v8.txt      | 31 +++++++++++++
 include/dt-bindings/soc/samsung,sysmmu-v8.h   | 43 +++++++++++++++++++
 2 files changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iommu/samsung,sysmmu-v8.txt
 create mode 100644 include/dt-bindings/soc/samsung,sysmmu-v8.h
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu-v8.txt b/Documentation/devicetree/bindings/iommu/samsung,sysmmu-v8.txt
new file mode 100644
index 000000000000..d6004ea4a746
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu-v8.txt
@@ -0,0 +1,31 @@ 
+Example (Exynos850, IOMMU for DPU usage):
+
+	#include <dt-bindings/soc/samsung,sysmmu-v8.h>
+
+	/* IOMMU group info */
+	iommu_group_dpu: iommu_group_dpu {
+		compatible = "samsung,sysmmu-group";
+	};
+
+	sysmmu_dpu: sysmmu@130c0000 {
+		compatible = "samsung,sysmmu-v8";
+		reg = <0x130c0000 0x9000>;
+		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+		qos = <15>;
+
+		clocks = <&cmu_dpu CLK_GOUT_DPU_SMMU_CLK>;
+		clock-names = "gate";
+
+		sysmmu,secure-irq;
+		sysmmu,secure_base = <0x130d0000>;
+		sysmmu,default_tlb = <TLB_CFG(BL1, PREFETCH_PREDICTION)>;
+		sysmmu,tlb_property =
+			<1 TLB_CFG(BL1, PREFETCH_PREDICTION) (DIR_READ | (1 << 16)) SYSMMU_ID_MASK(0x2, 0xF)>,
+			<2 TLB_CFG(BL1, PREFETCH_PREDICTION) (DIR_READ | (1 << 16)) SYSMMU_ID_MASK(0x4, 0xF)>,
+			<3 TLB_CFG(BL1, PREFETCH_PREDICTION) (DIR_READ | (1 << 16)) SYSMMU_ID_MASK(0x6, 0xF)>,
+			<4 TLB_CFG(BL1, PREFETCH_PREDICTION) (DIR_READ | (1 << 16)) SYSMMU_ID_MASK(0x8, 0xF)>;
+		port-name = "DPU";
+		#iommu-cells = <0>;
+		//power-domains = <&pd_dpu>;
+	};
diff --git a/include/dt-bindings/soc/samsung,sysmmu-v8.h b/include/dt-bindings/soc/samsung,sysmmu-v8.h
new file mode 100644
index 000000000000..2d422e05dae1
--- /dev/null
+++ b/include/dt-bindings/soc/samsung,sysmmu-v8.h
@@ -0,0 +1,43 @@ 
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants for Exynos System MMU.
+ */
+
+#ifndef _DT_BINDINGS_SAMSUNG_SYSMMU_V8_H
+#define _DT_BINDINGS_SAMSUNG_SYSMMU_V8_H
+
+/* define for fetchsize in TLB_CFG */
+#define BL1			(0x0 << 5)
+#define BL2			(0x1 << 5)
+#define BL4			(0x2 << 5)
+#define BL8			(0x3 << 5)
+#define BL16			(0x4 << 5)
+#define BL32			(0x5 << 5)
+#define BL64			(0x6 << 5)
+
+/* define for prefetch in TLB_CFG */
+#define PREFETCH_NONE		(0x0 << 1)
+#define PREFETCH_DESCENDING	(0x1 << 1)
+#define PREFETCH_ASCENDING	(0x3 << 1)
+#define PREFETCH_PREDICTION	(0x5 << 1)
+
+/* combine fetchsize and prefetch */
+#define TLB_CFG(fetchsize, prefetch)	(fetchsize | prefetch)
+#define TLB_CFG_DEFAULT		0x0
+
+/* define for direction in TLB_MATCH_CFG */
+#define DIR_NONE		(0x0 << 8)
+#define DIR_READ		(0x1 << 8)
+#define DIR_WRITE		(0x2 << 8)
+#define DIR_RW			(0x3 << 8)
+
+/* define for TLB_MATCH_SID */
+#define SYSMMU_ID_MASK(id,mask)		((mask) << 16 | (id))
+#define SYSMMU_NOID			0
+
+#endif /* _DT_BINDINGS_SAMSUNG_SYSMMU_V8_H */