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[1/8] dt-bindings: mailbox: Add binding for SDX65 APCS

Message ID 1644821668-18073-1-git-send-email-quic_rohiagar@quicinc.com
State Superseded
Headers show
Series [1/8] dt-bindings: mailbox: Add binding for SDX65 APCS | expand

Commit Message

Rohit Agarwal Feb. 14, 2022, 6:54 a.m. UTC
Add devicetree YAML binding for SDX65 APCS GCC block. The APCS block
acts as the mailbox controller and also provides a clock output and
takes 3 clock sources (pll, aux, ref) as input.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
index 01e9d91..688ae8b 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
@@ -91,6 +91,7 @@  allOf:
         compatible:
           enum:
             - qcom,sdx55-apcs-gcc
+            - qcom,sdx65-apcs-gcc
     then:
       properties:
         clocks: