| Message ID | 1443714982-16251-2-git-send-email-maxime.coquelin@st.com |
|---|---|
| State | Accepted |
| Commit | b89c429c1b4c176fee1912114ec7b2785949783b |
| Headers | show
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[209.132.180.67]) by mx.google.com with ESMTP id o66si5387201ioe.133.2015.10.01.08.58.09; Thu, 01 Oct 2015 08:58:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756850AbbJAP6H (ORCPT <rfc822;pingbo.wen@linaro.org> + 30 others); Thu, 1 Oct 2015 11:58:07 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:15859 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753554AbbJAP45 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 1 Oct 2015 11:56:57 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.14.5/8.14.5) with SMTP id t91FriHq006701; Thu, 1 Oct 2015 17:56:29 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 1x8edrnrbu-1 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 01 Oct 2015 17:56:29 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F3C9B38; Thu, 1 Oct 2015 15:56:08 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4085EA690; Thu, 1 Oct 2015 15:56:27 +0000 (GMT) Received: from localhost (10.201.23.80) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.224.2; Thu, 1 Oct 2015 17:56:26 +0200 From: Maxime Coquelin <maxime.coquelin@st.com> To: Giuseppe Cavallaro <peppe.cavallaro@st.com>, <peter.griffin@linaro.org>, <lee.jones@linaro.org>, <alexandre.torgue@st.com>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org> CC: <maxime.coquelin@st.com>, <kernel@stlinux.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH 1/4] ARM: dts: Fix RGMII pinctrl timings Date: Thu, 1 Oct 2015 17:56:19 +0200 Message-ID: <1443714982-16251-2-git-send-email-maxime.coquelin@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1443714982-16251-1-git-send-email-maxime.coquelin@st.com> References: <1443714982-16251-1-git-send-email-maxime.coquelin@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.80] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.14.151, 1.0.33, 0.0.0000 definitions=2015-10-01_05:2015-10-01, 2015-10-01, 1970-01-01 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: <patchwork-forward.linaro.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. 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diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index 8fe542a..a538ae5 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -216,9 +216,9 @@ rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>; rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>; rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>; - rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>; + rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>; clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>; - phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>; + phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>; }; };
These new re-timing values provides a better stability on Ethernet link. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/stih407-pinctrl.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)