| Message ID | 20220225125553.1185108-2-benchuanggli@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | mmc: sdhci-pci-gli: Add runtime PM for GL9763E | expand |
On Fri, 25 Feb 2022 at 13:56, Ben Chuang <benchuanggli@gmail.com> wrote: > > From: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > Add runtime PM for GL9763E and disable PLL in runtime suspend. So power > gated of upstream port can be enabled. > > Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> > Tested-by: Kevin Chang <kevin.chang@lcfuturecenter.com> > --- > drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c > index 97035d77c18c..cf99b6af792d 100644 > --- a/drivers/mmc/host/sdhci-pci-gli.c > +++ b/drivers/mmc/host/sdhci-pci-gli.c > @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) > pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); > } > > +#ifdef CONFIG_PM > +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip) > +{ > + struct sdhci_pci_slot *slot = chip->slots[0]; > + struct sdhci_host *host = slot->host; > + u16 clock; > + > + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN); > + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > + > + return 0; > +} > + > +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip) > +{ > + struct sdhci_pci_slot *slot = chip->slots[0]; > + struct sdhci_host *host = slot->host; > + ktime_t timeout; > + u16 clock; > + > + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > + > + clock |= SDHCI_CLOCK_PLL_EN; > + clock &= ~SDHCI_CLOCK_INT_STABLE; > + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > + > + timeout = ktime_add_ms(ktime_get(), 150); > + while (1) { > + bool timedout = ktime_after(ktime_get(), timeout); > + > + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > + if (clock & SDHCI_CLOCK_INT_STABLE) > + break; > + if (timedout) { > + pr_err("%s: PLL clock never stabilised.\n", > + mmc_hostname(host->mmc)); > + sdhci_dumpregs(host); > + break; > + } > + udelay(10); > + } > + clock |= SDHCI_CLOCK_CARD_EN; > + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > + > + return 0; > +} Both functions above look very similar to what sdhci_set_clock() does. Can you use that, rather than open coding the above? Other than that, I would appreciate it if Adrian could have a look at this too. For example, I wonder if perhaps sdhci_runtime_suspend|resume_host() should be called in these paths too. > +#endif > + > static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot) > { > struct pci_dev *pdev = slot->chip->pdev; > @@ -982,6 +1031,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = { > #ifdef CONFIG_PM_SLEEP > .resume = sdhci_cqhci_gli_resume, > .suspend = sdhci_cqhci_gli_suspend, > +#endif > +#ifdef CONFIG_PM > + .runtime_suspend = gl9763e_runtime_suspend, > + .runtime_resume = gl9763e_runtime_resume, > + .allow_runtime_pm = true, > #endif > .add_host = gl9763e_add_host, > }; > -- > 2.35.1 > Kind regards Uffe
On 28/02/2022 19:03, Ulf Hansson wrote: > On Fri, 25 Feb 2022 at 13:56, Ben Chuang <benchuanggli@gmail.com> wrote: >> >> From: Ben Chuang <ben.chuang@genesyslogic.com.tw> >> >> Add runtime PM for GL9763E and disable PLL in runtime suspend. So power >> gated of upstream port can be enabled. >> >> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> >> Tested-by: Kevin Chang <kevin.chang@lcfuturecenter.com> >> --- >> drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++ >> 1 file changed, 54 insertions(+) >> >> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c >> index 97035d77c18c..cf99b6af792d 100644 >> --- a/drivers/mmc/host/sdhci-pci-gli.c >> +++ b/drivers/mmc/host/sdhci-pci-gli.c >> @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) >> pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); >> } >> >> +#ifdef CONFIG_PM >> +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip) >> +{ >> + struct sdhci_pci_slot *slot = chip->slots[0]; >> + struct sdhci_host *host = slot->host; >> + u16 clock; >> + >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); >> + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN); >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); >> + >> + return 0; >> +} >> + >> +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip) >> +{ >> + struct sdhci_pci_slot *slot = chip->slots[0]; >> + struct sdhci_host *host = slot->host; >> + ktime_t timeout; >> + u16 clock; >> + >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); >> + >> + clock |= SDHCI_CLOCK_PLL_EN; >> + clock &= ~SDHCI_CLOCK_INT_STABLE; >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); >> + >> + timeout = ktime_add_ms(ktime_get(), 150); >> + while (1) { >> + bool timedout = ktime_after(ktime_get(), timeout); >> + >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); >> + if (clock & SDHCI_CLOCK_INT_STABLE) >> + break; >> + if (timedout) { >> + pr_err("%s: PLL clock never stabilised.\n", >> + mmc_hostname(host->mmc)); >> + sdhci_dumpregs(host); >> + break; >> + } >> + udelay(10); >> + } Could use something like read_poll_timeout() here e.g. if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) { pr_err("%s: PLL clock never stabilised.\n", mmc_hostname(host->mmc)); sdhci_dumpregs(host); } >> + clock |= SDHCI_CLOCK_CARD_EN; >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); >> + >> + return 0; >> +} > > Both functions above look very similar to what sdhci_set_clock() does. > Can you use that, rather than open coding the above? > > Other than that, I would appreciate it if Adrian could have a look at > this too. For example, I wonder if perhaps > sdhci_runtime_suspend|resume_host() should be called in these paths > too. Assuming the host controller does not lose state information, it should be fine. > >> +#endif >> + >> static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot) >> { >> struct pci_dev *pdev = slot->chip->pdev; >> @@ -982,6 +1031,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = { >> #ifdef CONFIG_PM_SLEEP >> .resume = sdhci_cqhci_gli_resume, >> .suspend = sdhci_cqhci_gli_suspend, >> +#endif >> +#ifdef CONFIG_PM >> + .runtime_suspend = gl9763e_runtime_suspend, >> + .runtime_resume = gl9763e_runtime_resume, >> + .allow_runtime_pm = true, >> #endif >> .add_host = gl9763e_add_host, >> }; >> -- >> 2.35.1 >> > > Kind regards > Uffe
On Wed, 2 Mar 2022 at 03:10, Ben Chuang <benchuanggli@gmail.com> wrote: > > Hi, > > On Tue, Mar 1, 2022 at 6:05 PM Adrian Hunter <adrian.hunter@intel.com> wrote: > > > > On 28/02/2022 19:03, Ulf Hansson wrote: > > > On Fri, 25 Feb 2022 at 13:56, Ben Chuang <benchuanggli@gmail.com> wrote: > > >> > > >> From: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > >> > > >> Add runtime PM for GL9763E and disable PLL in runtime suspend. So power > > >> gated of upstream port can be enabled. > > >> > > >> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > >> Tested-by: Kevin Chang <kevin.chang@lcfuturecenter.com> > > >> --- > > >> drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++ > > >> 1 file changed, 54 insertions(+) > > >> > > >> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c > > >> index 97035d77c18c..cf99b6af792d 100644 > > >> --- a/drivers/mmc/host/sdhci-pci-gli.c > > >> +++ b/drivers/mmc/host/sdhci-pci-gli.c > > >> @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) > > >> pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); > > >> } > > >> > > >> +#ifdef CONFIG_PM > > >> +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip) > > >> +{ > > >> + struct sdhci_pci_slot *slot = chip->slots[0]; > > >> + struct sdhci_host *host = slot->host; > > >> + u16 clock; > > >> + > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > >> + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN); > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > >> + > > >> + return 0; > > >> +} > > >> + > > >> +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip) > > >> +{ > > >> + struct sdhci_pci_slot *slot = chip->slots[0]; > > >> + struct sdhci_host *host = slot->host; > > >> + ktime_t timeout; > > >> + u16 clock; > > >> + > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > >> + > > >> + clock |= SDHCI_CLOCK_PLL_EN; > > >> + clock &= ~SDHCI_CLOCK_INT_STABLE; > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > >> + > > >> + timeout = ktime_add_ms(ktime_get(), 150); > > >> + while (1) { > > >> + bool timedout = ktime_after(ktime_get(), timeout); > > >> + > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > >> + if (clock & SDHCI_CLOCK_INT_STABLE) > > >> + break; > > >> + if (timedout) { > > >> + pr_err("%s: PLL clock never stabilised.\n", > > >> + mmc_hostname(host->mmc)); > > >> + sdhci_dumpregs(host); > > >> + break; > > >> + } > > >> + udelay(10); > > >> + } > > > > Could use something like read_poll_timeout() here e.g. > > > > if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), > > 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) { > > pr_err("%s: PLL clock never stabilised.\n", > > mmc_hostname(host->mmc)); > > sdhci_dumpregs(host); > > } > > > > > > Thanks for the tip. I will prepare the next patch. > > > >> + clock |= SDHCI_CLOCK_CARD_EN; > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > >> + > > >> + return 0; > > >> +} > > > > > > Both functions above look very similar to what sdhci_set_clock() does. > > > Can you use that, rather than open coding the above? > > > > > The codes turn on/off the clock but it doesn't change the clock. > Using sdhci_set_clock() needs to store the clock value because it > clears the clock. Well, in that case at least you can call sdhci_enable_clk() from gl9763e_runtime_resume(), rather than open coding it (the code looks like a direct copy of that code). All you need is to give the sdhci_enable_clk() the correct "clk" as in-parameter. > > > > Other than that, I would appreciate it if Adrian could have a look at > > > this too. For example, I wonder if perhaps > > > sdhci_runtime_suspend|resume_host() should be called in these paths > > > too. > > > > Assuming the host controller does not lose state information, it should be fine. > > > > Yes, the host always has aux. power and keep state. > > Thank you both for your comments. Okay, thanks for confirming! [...] Kind regards Uffe
Hi, On Wed, Mar 2, 2022 at 6:04 PM Ulf Hansson <ulf.hansson@linaro.org> wrote: > > On Wed, 2 Mar 2022 at 03:10, Ben Chuang <benchuanggli@gmail.com> wrote: > > > > Hi, > > > > On Tue, Mar 1, 2022 at 6:05 PM Adrian Hunter <adrian.hunter@intel.com> wrote: > > > > > > On 28/02/2022 19:03, Ulf Hansson wrote: > > > > On Fri, 25 Feb 2022 at 13:56, Ben Chuang <benchuanggli@gmail.com> wrote: > > > >> > > > >> From: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > > >> > > > >> Add runtime PM for GL9763E and disable PLL in runtime suspend. So power > > > >> gated of upstream port can be enabled. > > > >> > > > >> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > > >> Tested-by: Kevin Chang <kevin.chang@lcfuturecenter.com> > > > >> --- > > > >> drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++ > > > >> 1 file changed, 54 insertions(+) > > > >> > > > >> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c > > > >> index 97035d77c18c..cf99b6af792d 100644 > > > >> --- a/drivers/mmc/host/sdhci-pci-gli.c > > > >> +++ b/drivers/mmc/host/sdhci-pci-gli.c > > > >> @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) > > > >> pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); > > > >> } > > > >> > > > >> +#ifdef CONFIG_PM > > > >> +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip) > > > >> +{ > > > >> + struct sdhci_pci_slot *slot = chip->slots[0]; > > > >> + struct sdhci_host *host = slot->host; > > > >> + u16 clock; > > > >> + > > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > > >> + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN); > > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > > >> + > > > >> + return 0; > > > >> +} > > > >> + > > > >> +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip) > > > >> +{ > > > >> + struct sdhci_pci_slot *slot = chip->slots[0]; > > > >> + struct sdhci_host *host = slot->host; > > > >> + ktime_t timeout; > > > >> + u16 clock; > > > >> + > > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > > >> + > > > >> + clock |= SDHCI_CLOCK_PLL_EN; > > > >> + clock &= ~SDHCI_CLOCK_INT_STABLE; > > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > > >> + > > > >> + timeout = ktime_add_ms(ktime_get(), 150); > > > >> + while (1) { > > > >> + bool timedout = ktime_after(ktime_get(), timeout); > > > >> + > > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > > >> + if (clock & SDHCI_CLOCK_INT_STABLE) > > > >> + break; > > > >> + if (timedout) { > > > >> + pr_err("%s: PLL clock never stabilised.\n", > > > >> + mmc_hostname(host->mmc)); > > > >> + sdhci_dumpregs(host); > > > >> + break; > > > >> + } > > > >> + udelay(10); > > > >> + } > > > > > > Could use something like read_poll_timeout() here e.g. > > > > > > if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), > > > 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) { > > > pr_err("%s: PLL clock never stabilised.\n", > > > mmc_hostname(host->mmc)); > > > sdhci_dumpregs(host); > > > } > > > > > > > > > > Thanks for the tip. I will prepare the next patch. > > > > > >> + clock |= SDHCI_CLOCK_CARD_EN; > > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > > >> + > > > >> + return 0; > > > >> +} > > > > > > > > Both functions above look very similar to what sdhci_set_clock() does. > > > > Can you use that, rather than open coding the above? > > > > > > > > The codes turn on/off the clock but it doesn't change the clock. > > Using sdhci_set_clock() needs to store the clock value because it > > clears the clock. > > Well, in that case at least you can call sdhci_enable_clk() from > gl9763e_runtime_resume(), rather than open coding it (the code looks > like a direct copy of that code). All you need is to give the > sdhci_enable_clk() the correct "clk" as in-parameter. > I want to explain a little more, gl9763e is used as a boot disk controller. In gl9763e_runtime_suspend(), gl9763e still needs the internal clock to keep states. So gl9763e_runtime_suspend() only clears SDHCI_CLOCK_PLL_EN and SDHCI_CLOCK_CARD_EN. The SDHCI_CLOCK_INT_EN is still one (1) In runtime suspend, If using sdhci_enable_clk() in gl9763e_runtime_resume(), sdhci_enable_clk() only fills one (1) to this bit (SDHCI_CLOCK_INT_EN) again, it cannot cause internal stable bit (SDHCI_CLOCK_INT_STABLE) to one for gl9763e in the first while loop. > > > > > > Other than that, I would appreciate it if Adrian could have a look at > > > > this too. For example, I wonder if perhaps > > > > sdhci_runtime_suspend|resume_host() should be called in these paths > > > > too. > > > > > > Assuming the host controller does not lose state information, it should be fine. > > > > > > > Yes, the host always has aux. power and keep state. > > > > Thank you both for your comments. > > Okay, thanks for confirming! > > [...] > > Kind regards > Uffe Best regards, Ben
On Wed, 2 Mar 2022 at 12:56, Ben Chuang <benchuanggli@gmail.com> wrote: > > Hi, > > On Wed, Mar 2, 2022 at 6:04 PM Ulf Hansson <ulf.hansson@linaro.org> wrote: > > > > On Wed, 2 Mar 2022 at 03:10, Ben Chuang <benchuanggli@gmail.com> wrote: > > > > > > Hi, > > > > > > On Tue, Mar 1, 2022 at 6:05 PM Adrian Hunter <adrian.hunter@intel.com> wrote: > > > > > > > > On 28/02/2022 19:03, Ulf Hansson wrote: > > > > > On Fri, 25 Feb 2022 at 13:56, Ben Chuang <benchuanggli@gmail.com> wrote: > > > > >> > > > > >> From: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > > > >> > > > > >> Add runtime PM for GL9763E and disable PLL in runtime suspend. So power > > > > >> gated of upstream port can be enabled. > > > > >> > > > > >> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> > > > > >> Tested-by: Kevin Chang <kevin.chang@lcfuturecenter.com> > > > > >> --- > > > > >> drivers/mmc/host/sdhci-pci-gli.c | 54 ++++++++++++++++++++++++++++++++ > > > > >> 1 file changed, 54 insertions(+) > > > > >> > > > > >> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c > > > > >> index 97035d77c18c..cf99b6af792d 100644 > > > > >> --- a/drivers/mmc/host/sdhci-pci-gli.c > > > > >> +++ b/drivers/mmc/host/sdhci-pci-gli.c > > > > >> @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) > > > > >> pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); > > > > >> } > > > > >> > > > > >> +#ifdef CONFIG_PM > > > > >> +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip) > > > > >> +{ > > > > >> + struct sdhci_pci_slot *slot = chip->slots[0]; > > > > >> + struct sdhci_host *host = slot->host; > > > > >> + u16 clock; > > > > >> + > > > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > > > >> + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN); > > > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > > > >> + > > > > >> + return 0; > > > > >> +} > > > > >> + > > > > >> +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip) > > > > >> +{ > > > > >> + struct sdhci_pci_slot *slot = chip->slots[0]; > > > > >> + struct sdhci_host *host = slot->host; > > > > >> + ktime_t timeout; > > > > >> + u16 clock; > > > > >> + > > > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > > > >> + > > > > >> + clock |= SDHCI_CLOCK_PLL_EN; > > > > >> + clock &= ~SDHCI_CLOCK_INT_STABLE; > > > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > > > >> + > > > > >> + timeout = ktime_add_ms(ktime_get(), 150); > > > > >> + while (1) { > > > > >> + bool timedout = ktime_after(ktime_get(), timeout); > > > > >> + > > > > >> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > > > >> + if (clock & SDHCI_CLOCK_INT_STABLE) > > > > >> + break; > > > > >> + if (timedout) { > > > > >> + pr_err("%s: PLL clock never stabilised.\n", > > > > >> + mmc_hostname(host->mmc)); > > > > >> + sdhci_dumpregs(host); > > > > >> + break; > > > > >> + } > > > > >> + udelay(10); > > > > >> + } > > > > > > > > Could use something like read_poll_timeout() here e.g. > > > > > > > > if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), > > > > 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) { > > > > pr_err("%s: PLL clock never stabilised.\n", > > > > mmc_hostname(host->mmc)); > > > > sdhci_dumpregs(host); > > > > } > > > > > > > > > > > > > > Thanks for the tip. I will prepare the next patch. > > > > > > > >> + clock |= SDHCI_CLOCK_CARD_EN; > > > > >> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); > > > > >> + > > > > >> + return 0; > > > > >> +} > > > > > > > > > > Both functions above look very similar to what sdhci_set_clock() does. > > > > > Can you use that, rather than open coding the above? > > > > > > > > > > > The codes turn on/off the clock but it doesn't change the clock. > > > Using sdhci_set_clock() needs to store the clock value because it > > > clears the clock. > > > > Well, in that case at least you can call sdhci_enable_clk() from > > gl9763e_runtime_resume(), rather than open coding it (the code looks > > like a direct copy of that code). All you need is to give the > > sdhci_enable_clk() the correct "clk" as in-parameter. > > > > I want to explain a little more, > gl9763e is used as a boot disk controller. > In gl9763e_runtime_suspend(), gl9763e still needs the internal clock to keep states. > So gl9763e_runtime_suspend() only clears SDHCI_CLOCK_PLL_EN and SDHCI_CLOCK_CARD_EN. > The SDHCI_CLOCK_INT_EN is still one (1) In runtime suspend, > > If using sdhci_enable_clk() in gl9763e_runtime_resume(), sdhci_enable_clk() > only fills one (1) to this bit (SDHCI_CLOCK_INT_EN) again, it cannot cause internal stable bit > (SDHCI_CLOCK_INT_STABLE) to one for gl9763e in the first while loop. Okay, I get it now, thanks for clarifying. In any case, the loop in sdhci_enable_clk() that polls the SDHCI_CLOCK_CONTROL register to see if the SDHCI_CLOCK_INT_STABLE is set, could perhaps be split out to a function that you can use here as well. [...] Kind regards Uffe
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index 97035d77c18c..cf99b6af792d 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -873,6 +873,55 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); } +#ifdef CONFIG_PM +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip) +{ + struct sdhci_pci_slot *slot = chip->slots[0]; + struct sdhci_host *host = slot->host; + u16 clock; + + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN); + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); + + return 0; +} + +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip) +{ + struct sdhci_pci_slot *slot = chip->slots[0]; + struct sdhci_host *host = slot->host; + ktime_t timeout; + u16 clock; + + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + + clock |= SDHCI_CLOCK_PLL_EN; + clock &= ~SDHCI_CLOCK_INT_STABLE; + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); + + timeout = ktime_add_ms(ktime_get(), 150); + while (1) { + bool timedout = ktime_after(ktime_get(), timeout); + + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + if (clock & SDHCI_CLOCK_INT_STABLE) + break; + if (timedout) { + pr_err("%s: PLL clock never stabilised.\n", + mmc_hostname(host->mmc)); + sdhci_dumpregs(host); + break; + } + udelay(10); + } + clock |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); + + return 0; +} +#endif + static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot) { struct pci_dev *pdev = slot->chip->pdev; @@ -982,6 +1031,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = { #ifdef CONFIG_PM_SLEEP .resume = sdhci_cqhci_gli_resume, .suspend = sdhci_cqhci_gli_suspend, +#endif +#ifdef CONFIG_PM + .runtime_suspend = gl9763e_runtime_suspend, + .runtime_resume = gl9763e_runtime_resume, + .allow_runtime_pm = true, #endif .add_host = gl9763e_add_host, };