Message ID | 20220302225411.2456001-1-dmitry.baryshkov@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | [v2,1/6] arm64: dts: qcom: msm8996: Drop flags for mdss irqs | expand |
On 3/2/2022 2:54 PM, Dmitry Baryshkov wrote: > The number of interrupt cells for the mdss interrupt controller is 1, > meaning there should only be one cell for the interrupt number, not two. > Drop the second cell containing (unused) irq flags. > > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Fixes: b52555d590d1 ("arm64: dts: qcom: sdm630: Add MDSS nodes") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index 240293592ef9..7f875bf9390a 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { > reg-names = "mdp_phys"; > > interrupt-parent = <&mdss>; > - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <0>; > > assigned-clocks = <&mmcc MDSS_MDP_CLK>, > <&mmcc MDSS_VSYNC_CLK>; > @@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { > power-domains = <&rpmpd SDM660_VDDCX>; > > interrupt-parent = <&mdss>; > - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <4>; > > assigned-clocks = <&mmcc BYTE0_CLK_SRC>, > <&mmcc PCLK0_CLK_SRC>;
On 2022-03-03 01:54:07, Dmitry Baryshkov wrote: > The number of interrupt cells for the mdss interrupt controller is 1, > meaning there should only be one cell for the interrupt number, not two. > Drop the second cell containing (unused) irq flags. > > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Fixes: b52555d590d1 ("arm64: dts: qcom: sdm630: Add MDSS nodes") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Thanks for adding the Fixes: tag. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Nit: Robh also removed the trailing empty newline in his patch: https://lore.kernel.org/linux-arm-msm/20220302013339.2354076-1-robh@kernel.org/ > --- > arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index 240293592ef9..7f875bf9390a 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { > reg-names = "mdp_phys"; > > interrupt-parent = <&mdss>; > - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <0>; > > assigned-clocks = <&mmcc MDSS_MDP_CLK>, > <&mmcc MDSS_VSYNC_CLK>; > @@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { > power-domains = <&rpmpd SDM660_VDDCX>; > > interrupt-parent = <&mdss>; > - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <4>; > > assigned-clocks = <&mmcc BYTE0_CLK_SRC>, > <&mmcc PCLK0_CLK_SRC>; > -- > 2.34.1 >
On 2022-03-03 01:54:06, Dmitry Baryshkov wrote: > The number of interrupt cells for the mdss interrupt controller is 1, > meaning there should only be one cell for the interrupt number, not two. > Drop the second cell containing (unused) irq flags. > > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Fixes: 12d540375736 ("arm64: dts: qcom: msm8996: Add DSI0 nodes") > Fixes: 3a4547c1fc2f ("arm64: qcom: msm8996.dtsi: Add Display nodes") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Thanks for adding the Fixes: tag. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > index f0f81c23c16f..0597d865a4a6 100644 > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > @@ -788,7 +788,7 @@ mdp: mdp@901000 { > reg-names = "mdp_phys"; > > interrupt-parent = <&mdss>; > - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <0>; > > clocks = <&mmcc MDSS_AHB_CLK>, > <&mmcc MDSS_AXI_CLK>, > @@ -834,7 +834,7 @@ dsi0: dsi@994000 { > reg-names = "dsi_ctrl"; > > interrupt-parent = <&mdss>; > - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <4>; > > clocks = <&mmcc MDSS_MDP_CLK>, > <&mmcc MDSS_BYTE0_CLK>, > @@ -904,7 +904,7 @@ hdmi: hdmi-tx@9a0000 { > "hdcp_physical"; > > interrupt-parent = <&mdss>; > - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <8>; > > clocks = <&mmcc MDSS_MDP_CLK>, > <&mmcc MDSS_AHB_CLK>, > -- > 2.34.1 >
On 2022-03-03 01:54:09, Dmitry Baryshkov wrote: > The number of interrupt cells for the mdss interrupt controller is 1, > meaning there should only be one cell for the interrupt number, not two. > Drop the second cell containing (unused) irq flags. > > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Fixes: 08c2a076d18f ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Thanks for adding the Fixes: tag. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 41f4e46e1f85..95e6a97c2170 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -4281,7 +4281,7 @@ mdss_mdp: mdp@ae01000 { > power-domains = <&rpmhpd SDM845_CX>; > > interrupt-parent = <&mdss>; > - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <0>; > > ports { > #address-cells = <1>; > @@ -4333,7 +4333,7 @@ dsi0: dsi@ae94000 { > reg-names = "dsi_ctrl"; > > interrupt-parent = <&mdss>; > - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <4>; > > clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, > <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, > @@ -4405,7 +4405,7 @@ dsi1: dsi@ae96000 { > reg-names = "dsi_ctrl"; > > interrupt-parent = <&mdss>; > - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <5>; > > clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, > <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, > -- > 2.34.1 >
On 2022-03-03 01:54:10, Dmitry Baryshkov wrote: > The number of interrupt cells for the mdss interrupt controller is 1, > meaning there should only be one cell for the interrupt number, not two. > Drop the second cell containing (unused) irq flags. > > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes") > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Thanks for adding the Fixes: tag. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index fdaf303ba047..956848068871 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -3200,7 +3200,7 @@ mdss_mdp: mdp@ae01000 { > power-domains = <&rpmhpd SM8250_MMCX>; > > interrupt-parent = <&mdss>; > - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <0>; > > ports { > #address-cells = <1>; > @@ -3252,7 +3252,7 @@ dsi0: dsi@ae94000 { > reg-names = "dsi_ctrl"; > > interrupt-parent = <&mdss>; > - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <4>; > > clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, > <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, > @@ -3325,7 +3325,7 @@ dsi1: dsi@ae96000 { > reg-names = "dsi_ctrl"; > > interrupt-parent = <&mdss>; > - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <5>; > > clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, > <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, > -- > 2.34.1 >
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index f0f81c23c16f..0597d865a4a6 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -788,7 +788,7 @@ mdp: mdp@901000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>, @@ -834,7 +834,7 @@ dsi0: dsi@994000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_BYTE0_CLK>, @@ -904,7 +904,7 @@ hdmi: hdmi-tx@9a0000 { "hdcp_physical"; interrupt-parent = <&mdss>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <8>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_AHB_CLK>,