diff mbox series

[v1,4/4] dt-bindings: pinctrl: mt8192: Add gpio-line-names property

Message ID 20220315211936.442708-5-nfraprado@collabora.com
State Accepted
Commit 1a08cb7303cfd898cb9b5c5b1a185e7ed329919f
Headers show
Series dt-bindings: pinctrl: mt8192: Add missing wrapping node and properties | expand

Commit Message

Nícolas F. R. A. Prado March 15, 2022, 9:19 p.m. UTC
Add the gpio-line-names optional property to the pinctrl-mt8192 binding
to prevent dt_binding_check warnings when it is present in the pinctrl
node in the Devicetree.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
---

 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml | 2 ++
 1 file changed, 2 insertions(+)

Comments

AngeloGioacchino Del Regno March 16, 2022, 8:39 a.m. UTC | #1
Il 15/03/22 22:19, Nícolas F. R. A. Prado ha scritto:
> Add the gpio-line-names optional property to the pinctrl-mt8192 binding
> to prevent dt_binding_check warnings when it is present in the pinctrl
> node in the Devicetree.
> 
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>


Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Linus Walleij April 19, 2022, 9:15 p.m. UTC | #2
On Tue, Mar 15, 2022 at 10:20 PM Nícolas F. R. A. Prado
<nfraprado@collabora.com> wrote:

> Add the gpio-line-names optional property to the pinctrl-mt8192 binding
> to prevent dt_binding_check warnings when it is present in the pinctrl
> node in the Devicetree.
>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

Patch applied!

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
index e27cbcc6e8f9..c90a132fbc79 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
@@ -29,6 +29,8 @@  properties:
     description: gpio valid number range.
     maxItems: 1
 
+  gpio-line-names: true
+
   reg:
     description: |
       Physical address base for gpio base registers. There are 11 GPIO