| Message ID | 20220411114926.1975363-3-dmitry.baryshkov@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: qcom: Fix higher MSI vectors handling | expand |
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 0adb56d5645e..64632f3e4334 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -57,12 +57,14 @@ - interrupts: Usage: required Value type: <prop-encoded-array> - Definition: MSI interrupt + Definition: MSI interrupt(s) - interrupt-names: Usage: required Value type: <stringlist> Definition: Should contain "msi" + May also contains "msi2", "msi3"... up to "msi8" + if the platform supports additional MSI interrupts. - #interrupt-cells: Usage: required
On Qualcomm platforms each group of MSI interrupts is routed to the separate GIC interrupt. Document mapping of additional interrupts. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Documentation/devicetree/bindings/pci/qcom,pcie.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)