| Message ID | 20151104171048.GE23860@leverpostej |
|---|---|
| State | New |
| Headers | show |
On Wed, Nov 04, 2015 at 07:31:42PM +0000, Russell King - ARM Linux wrote: > On Wed, Nov 04, 2015 at 05:10:49PM +0000, Mark Rutland wrote: > > Yes, the CPU should start at __pa(secondary_entry) in head.S. From there > > it will branch to secondary_startup: > > > > ENTRY(secondary_entry) > > bl el2_setup // Drop to EL1 > > bl set_cpu_boot_mode_flag > > b secondary_startup > > ENDPROC(secondary_entry) > > We've been busy telling people to implement errata workarounds in firmware, > and we're also busy telling people that their secondary CPUs should start > in the kernel. The two are incompatible with each other... I think this could have been worded better, something like: the CPU should enter the non-secure EL2 or EL1 at __pa(secondary_entry). Avoiding the word "start" means that we are not excluding the firmware. On arm64 we can't skip secure firmware since all CPUs reset at EL3 anyway. > I think we need to come up with a clearer statement on both these subjects > which gives people a good idea about what's required, and doesn't send out > confusing messages. I agree, Documentation/{arm/Booting,arm64/booting.txt} should clearly state the requirements. Not sure many people read them but at least they can be told about. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Wed, Nov 04, 2015 at 07:31:42PM +0000, Russell King - ARM Linux wrote: > On Wed, Nov 04, 2015 at 05:10:49PM +0000, Mark Rutland wrote: > > Yes, the CPU should start at __pa(secondary_entry) in head.S. From there > > it will branch to secondary_startup: > > > > ENTRY(secondary_entry) > > bl el2_setup // Drop to EL1 > > bl set_cpu_boot_mode_flag > > b secondary_startup > > ENDPROC(secondary_entry) > > We've been busy telling people to implement errata workarounds in firmware, > and we're also busy telling people that their secondary CPUs should start > in the kernel. The two are incompatible with each other... Indeed. The above should have read "having exited the firmware, the CPU should enter the kernel at __pa(secondary_entry)". Out of reset all CPUs will go through firmware, where any IMPLEMENTATION DEFINED initialisation (including errata workarounds and coherency management) will have taken place, the exception vectors necessary for the PSCI implementation will be registered, etc. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c index f67f35b..8dd9e0a 100644 --- a/arch/arm64/kernel/psci.c +++ b/arch/arm64/kernel/psci.c @@ -111,13 +111,37 @@ static int __init cpu_psci_cpu_prepare(unsigned int cpu) return 0; } +static int cpu_psci_check_online(int cpu) +{ + int err, i; + + if (!psci_ops.affinity_info) + return 0; + + for (i = 0; i < 10; i++) { + err = psci_ops.affinity_info(cpu_logical_map(cpu), 0); + if (err == PSCI_0_2_AFFINITY_LEVEL_ON) { + pr_info("CPU%d reported online\n", cpu); + return 0; + } + msleep(10); + pr_info("CPU%d reported in state %d", cpu, err); + } + + pr_warn("CPU%d was not reported online in a timely fashion\n", cpu); + + return -ETIMEDOUT; +} + static int cpu_psci_cpu_boot(unsigned int cpu) { int err = psci_ops.cpu_on(cpu_logical_map(cpu), __pa(secondary_entry)); - if (err) + if (err) { pr_err("failed to boot CPU%d (%d)\n", cpu, err); + return err; + } - return err; + return cpu_psci_check_online(cpu); } #ifdef CONFIG_HOTPLUG_CPU