commit 10562c44766a57e4762e926f876f5457f9899e33
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Wed Oct 28 10:49:44 2015 +0000
[AArch64] PR target/68129: Define TARGET_SUPPORTS_WIDE_INT
@@ -4401,11 +4401,10 @@ aarch64_print_operand (FILE *f, rtx x, char code)
break;
case CONST_DOUBLE:
- /* CONST_DOUBLE can represent a double-width integer.
- In this case, the mode of x is VOIDmode. */
- if (GET_MODE (x) == VOIDmode)
- ; /* Do Nothing. */
- else if (aarch64_float_const_zero_rtx_p (x))
+ /* Since we define TARGET_SUPPORTS_WIDE_INT we shouldn't ever
+ be getting CONST_DOUBLEs holding integers. */
+ gcc_assert (GET_MODE (x) != VOIDmode);
+ if (aarch64_float_const_zero_rtx_p (x))
{
fputc ('0', f);
break;
@@ -863,6 +863,8 @@ extern enum aarch64_code_model aarch64_cmodel;
(aarch64_cmodel == AARCH64_CMODEL_TINY \
|| aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)
+#define TARGET_SUPPORTS_WIDE_INT 1
+
/* Modes valid for AdvSIMD D registers, i.e. that fit in half a Q register. */
#define AARCH64_VALID_SIMD_DREG_MODE(MODE) \
((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
@@ -32,7 +32,7 @@ (define_predicate "aarch64_call_insn_operand"
;; Return true if OP a (const_int 0) operand.
(define_predicate "const0_operand"
- (and (match_code "const_int, const_double")
+ (and (match_code "const_int")
(match_test "op == CONST0_RTX (mode)")))
(define_predicate "aarch64_ccmp_immediate"
new file mode 100644
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fno-split-wide-types" } */
+
+typedef int V __attribute__ ((vector_size (8 * sizeof (int))));
+
+void
+foo (V *p, V *q)
+{
+ *p = (*p == *q);
+}