@@ -9,7 +9,10 @@ Required properties:
- reg : should contain eSDHC registers location and length.
- interrupts : should contain eSDHC interrupt.
- interrupt-parent : interrupt source phandle.
- - clock-frequency : specifies eSDHC base clock frequency.
+ - clock-frequency : (mandatory for powerpc platform) specifies
+ eSDHC base clock frequency.
+ - bus-clock : (mandatory for arm platform) specifies phandle of
+ eSDHC clock provider.
- sdhci,wp-inverted : (optional) specifies that eSDHC controller
reports inverted write-protect state;
- sdhci,1-bit-only : (optional) specifies that a controller can
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- .../devicetree/bindings/mmc/fsl-esdhc.txt | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)