[32/47] target/arm: Use tcg_constant in LDM, STM

Message ID	20220426163043.100432-33-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PATCH 32/47] target/arm: Use tcg_constant in LDM, STM Date: Tue, 26 Apr 2022 09:30:28 -0700 Message-Id: <20220426163043.100432-33-richard.henderson@linaro.org> In-Reply-To: <20220426163043.100432-1-richard.henderson@linaro.org> References: <20220426163043.100432-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	target/arm: Use tcg_constant \| expand [00/47] target/arm: Use tcg_constant [01/47] target/arm: Use tcg_constant in gen_probe_access [02/47] target/arm: Use tcg_constant in gen_mte_check* [03/47] target/arm: Use tcg_constant in gen_exception* [04/47] target/arm: Use tcg_constant in gen_adc_CC [05/47] target/arm: Use tcg_constant in handle_msr_i [06/47] target/arm: Use tcg_constant in handle_sys [07/47] target/arm: Use tcg_constant in disas_exc [08/47] target/arm: Use tcg_constant in gen_compare_and_swap_pair [09/47] target/arm: Use tcg_constant in disas_ld_lit [10/47] target/arm: Use tcg_constant in disas_ldst_* [11/47] target/arm: Use tcg_constant in disas_add_sum_imm* [12/47] target/arm: Use tcg_constant in disas_movw_imm [13/47] target/arm: Use tcg_constant in shift_reg_imm [14/47] target/arm: Use tcg_constant in disas_cond_select [15/47] target/arm: Use tcg_constant in handle_{rev16,crc32} [16/47] target/arm: Use tcg_constant in disas_data_proc_2src [17/47] target/arm: Use tcg_constant in disas_fp* [18/47] target/arm: Use tcg_constant in simd shift expanders [19/47] target/arm: Use tcg_constant in simd fp/int conversion [20/47] target/arm: Use tcg_constant in 2misc expanders [21/47] target/arm: Use tcg_constant in balance of translate-a64.c [22/47] target/arm: Use tcg_constant for aa32 exceptions [23/47] target/arm: Use tcg_constant for disas_iwmmxt_insn [24/47] target/arm: Use tcg_constant for gen_{msr,mrs} [25/47] target/arm: Use tcg_constant for vector shift expanders [26/47] target/arm: Use tcg_constant for do_coproc_insn [27/47] target/arm: Use tcg_constant for gen_srs [28/47] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot [29/47] target/arm: Use tcg_constant for MOVW, UMAAL, CRC32 [30/47] target/arm: Use tcg_constant for v7m MRS, MSR [31/47] target/arm: Use tcg_constant for TT, SAT, SMMLA [32/47] target/arm: Use tcg_constant in LDM, STM [33/47] target/arm: Use tcg_constant in CLRM, DLS, WLS, LE [34/47] target/arm: Use tcg_constant in trans_CPS_v7m [35/47] target/arm: Use tcg_constant in trans_CSEL [36/47] target/arm: Use tcg_constant for trans_INDEX_* [37/47] target/arm: Use tcg_constant in SINCDEC, INCDEC [38/47] target/arm: Use tcg_constant in FCPY, CPY [39/47] target/arm: Use tcg_constant in {incr, wrap}_last_active [40/47] target/arm: Use tcg_constant in do_clast_scalar [41/47] target/arm: Use tcg_constant in WHILE [42/47] target/arm: Use tcg_constant in LD1, ST1 [43/47] target/arm: Use tcg_constant in SUBR [44/47] target/arm: Use tcg_constant in do_zzi_{sat, ool}, do_fp_imm [45/47] target/arm: Use tcg_constant for predicate descriptors [46/47] target/arm: Use tcg_constant for do_brk{2,3} [47/47] target/arm: Use tcg_constant for vector descriptor

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20220426163043.100432-33-richard.henderson@linaro.org

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH 32/47] target/arm: Use tcg_constant in LDM, STM
Date: Tue, 26 Apr 2022 09:30:28 -0700
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Series

target/arm: Use tcg_constant | expand

Comments

Peter Maydell April 28, 2022, 10:37 a.m. UTC | #1

On Tue, 26 Apr 2022 at 17:46, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/translate.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 24e522e1d6..e0469da0a1 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8050,7 +8050,7 @@  static bool op_stm(DisasContext *s, arg_ldst_block *a, int min_n)
 {
     int i, j, n, list, mem_idx;
     bool user = a->u;
-    TCGv_i32 addr, tmp, tmp2;
+    TCGv_i32 addr, tmp;
 
     if (user) {
         /* STM (user) */
@@ -8080,9 +8080,7 @@  static bool op_stm(DisasContext *s, arg_ldst_block *a, int min_n)
 
         if (user && i != 15) {
             tmp = tcg_temp_new_i32();
-            tmp2 = tcg_const_i32(i);
-            gen_helper_get_user_reg(tmp, cpu_env, tmp2);
-            tcg_temp_free_i32(tmp2);
+            gen_helper_get_user_reg(tmp, cpu_env, tcg_constant_i32(i));
         } else {
             tmp = load_reg(s, i);
         }
@@ -8123,7 +8121,7 @@  static bool do_ldm(DisasContext *s, arg_ldst_block *a, int min_n)
     bool loaded_base;
     bool user = a->u;
     bool exc_return = false;
-    TCGv_i32 addr, tmp, tmp2, loaded_var;
+    TCGv_i32 addr, tmp, loaded_var;
 
     if (user) {
         /* LDM (user), LDM (exception return) */
@@ -8166,9 +8164,7 @@  static bool do_ldm(DisasContext *s, arg_ldst_block *a, int min_n)
         tmp = tcg_temp_new_i32();
         gen_aa32_ld_i32(s, tmp, addr, mem_idx, MO_UL | MO_ALIGN);
         if (user) {
-            tmp2 = tcg_const_i32(i);
-            gen_helper_set_user_reg(cpu_env, tmp2, tmp);
-            tcg_temp_free_i32(tmp2);
+            gen_helper_set_user_reg(cpu_env, tcg_constant_i32(i), tmp);
             tcg_temp_free_i32(tmp);
         } else if (i == a->rn) {
             loaded_var = tmp;

[32/47] target/arm: Use tcg_constant in LDM, STM

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Patch