diff mbox series

[v4,1/3] media: dt-binding: media: Add rockchip-vepu binding

Message ID 20220514133604.174905-2-frattaroli.nicolas@gmail.com
State New
Headers show
Series Enable JPEG Encoder on RK3566/RK3568 | expand

Commit Message

Nicolas Frattaroli May 14, 2022, 1:36 p.m. UTC 
The RK3568 and RK3566 have a Hantro VPU node solely dedicated to
encoding. This patch adds a new binding to describe it, as it
does not really fit the rockchip-vpu binding, since there is no
decoder.

Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
---
 .../bindings/media/rockchip-vepu.yaml         | 64 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 65 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/rockchip-vepu.yaml
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/rockchip-vepu.yaml b/Documentation/devicetree/bindings/media/rockchip-vepu.yaml
new file mode 100644
index 000000000000..b7ba5bf3517a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-vepu.yaml
@@ -0,0 +1,64 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/media/rockchip-vepu.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Hantro G1 VPU encoders implemented on Rockchip SoCs
+
+maintainers:
+  - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
+
+description:
+  Hantro G1 video encode-only accelerators present on Rockchip SoCs.
+
+properties:
+  compatible:
+    enum:
+      - rockchip,rk3568-vepu
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: aclk
+      - const: hclk
+
+  power-domains:
+    maxItems: 1
+
+  iommus:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+        #include <dt-bindings/clock/rk3568-cru.h>
+        #include <dt-bindings/interrupt-controller/arm-gic.h>
+        #include <dt-bindings/power/rk3568-power.h>
+
+        vepu: video-codec@fdee0000 {
+                compatible = "rockchip,rk3568-vepu";
+                reg = <0x0 0xfdee0000 0x0 0x800>;
+                interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
+                clock-names = "aclk", "hclk";
+                iommus = <&vepu_mmu>;
+                power-domains = <&power RK3568_PD_RGA>;
+        };
diff --git a/MAINTAINERS b/MAINTAINERS
index 9ce78f2275dc..f901a42e5d0f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8637,6 +8637,7 @@  L:	linux-media@vger.kernel.org
 L:	linux-rockchip@lists.infradead.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
+F:	Documentation/devicetree/bindings/media/rockchip-vepu.yaml
 F:	Documentation/devicetree/bindings/media/rockchip-vpu.yaml
 F:	drivers/staging/media/hantro/