| Message ID | 20220524120802.9394-1-piyush.mehta@xilinx.com |
|---|---|
| State | New |
| Headers | show |
| Series | [RFC] usb: chipidea: Add support for VBUS control with PHY | expand |
Hello Peter, Thanks for the review. Yes, we are supporting OTG feature and have used OTG FSM platform. Regards, Piyush Mehta > -----Original Message----- > From: Peter Chen <peter.chen@kernel.org> > Sent: Sunday, July 3, 2022 6:05 AM > To: Piyush Mehta <piyush.mehta@xilinx.com> > Cc: gregkh@linuxfoundation.org; michal.simek@xilinx.com; linux- > usb@vger.kernel.org; linux-kernel@vger.kernel.org; git@xilinx.com; > sivadur@xilinx.com; radheys@xilinx.com > Subject: Re: [RFC PATCH] usb: chipidea: Add support for VBUS control with > PHY > > CAUTION: This message has originated from an External Source. Please use > proper judgment and caution when opening attachments, clicking links, or > responding to this email. > > > On 22-05-24 17:38:02, Piyush Mehta wrote: > > Some platforms make use of VBUS control over PHY which means > > controller driver has to access PHY registers to turn on/off VBUS > > line.This patch adds support for such platforms in chipidea. > > > > Flag 'CI_HDRC_PHY_VBUS_CONTROL' added to support VBus control > feature. > > > > Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> > > --- > > We have created this patch as RFC, as I introduced a new flag > > (CI_HDRC_PHY_VBUS_CONTROL) and would like to get comment if it's the > > proper way to check for VBus support for zynq. > > --- > > drivers/usb/chipidea/ci_hdrc_usb2.c | 1 + > > drivers/usb/chipidea/host.c | 7 +++++++ > > drivers/usb/chipidea/otg_fsm.c | 7 +++++++ > > include/linux/usb/chipidea.h | 1 + > > 4 files changed, 16 insertions(+) > > > > diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c > > b/drivers/usb/chipidea/ci_hdrc_usb2.c > > index 89e1d82..dc86b12 100644 > > --- a/drivers/usb/chipidea/ci_hdrc_usb2.c > > +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c > > @@ -30,6 +30,7 @@ static const struct ci_hdrc_platform_data > > ci_default_pdata = { > > > > static const struct ci_hdrc_platform_data ci_zynq_pdata = { > > .capoffset = DEF_CAPOFFSET, > > + .flags = CI_HDRC_PHY_VBUS_CONTROL, > > }; > > > > static const struct ci_hdrc_platform_data ci_zevio_pdata = { diff > > --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c > > index bdc3885..bc3634a 100644 > > --- a/drivers/usb/chipidea/host.c > > +++ b/drivers/usb/chipidea/host.c > > @@ -63,6 +63,13 @@ static int ehci_ci_portpower(struct usb_hcd *hcd, int > portnum, bool enable) > > priv->enabled = enable; > > } > > > > + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) { > > + if (enable) > > + usb_phy_vbus_on(ci->usb_phy); > > + else > > + usb_phy_vbus_off(ci->usb_phy); > > + } > > + > > if (enable && (ci->platdata->phy_mode == > USBPHY_INTERFACE_MODE_HSIC)) { > > /* > > * Marvell 28nm HSIC PHY requires forcing the port to HS mode. > > diff --git a/drivers/usb/chipidea/otg_fsm.c > > b/drivers/usb/chipidea/otg_fsm.c index 6ed4b00..5ed9164 100644 > > --- a/drivers/usb/chipidea/otg_fsm.c > > +++ b/drivers/usb/chipidea/otg_fsm.c > > @@ -471,6 +471,10 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, > int on) > > return; > > } > > } > > + > > + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) > > + usb_phy_vbus_on(ci->usb_phy); > > + > > /* Disable data pulse irq */ > > hw_write_otgsc(ci, OTGSC_DPIE, 0); > > > > @@ -480,6 +484,9 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int > on) > > if (ci->platdata->reg_vbus) > > regulator_disable(ci->platdata->reg_vbus); > > > > + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) > > + usb_phy_vbus_off(ci->usb_phy); > > + > > Have your platform used OTG FSM? If not used, do not need to change it. > Otherwise, it is okay for me. > > Peter > > > fsm->a_bus_drop = 1; > > fsm->a_bus_req = 0; > > } > > diff --git a/include/linux/usb/chipidea.h > > b/include/linux/usb/chipidea.h index edf3342..ee38835 100644 > > --- a/include/linux/usb/chipidea.h > > +++ b/include/linux/usb/chipidea.h > > @@ -62,6 +62,7 @@ struct ci_hdrc_platform_data { #define > > CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) > > #define CI_HDRC_IMX_IS_HSIC BIT(14) > > #define CI_HDRC_PMQOS BIT(15) > > +#define CI_HDRC_PHY_VBUS_CONTROL BIT(16) > > enum usb_dr_mode dr_mode; > > #define CI_HDRC_CONTROLLER_RESET_EVENT 0 > > #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 > > -- > > 2.7.4 > > > > -- > > Thanks, > Peter Chen
On 22-07-11 16:45:20, Mehta, Piyush wrote: > Hello Peter, > > Thanks for the review. > Yes, we are supporting OTG feature and have used OTG FSM platform. Please generate the formal patch with my ack, thanks. Acked-by: Peter Chen <peter.chen@kernel.org> > > Regards, > Piyush Mehta > > > -----Original Message----- > > From: Peter Chen <peter.chen@kernel.org> > > Sent: Sunday, July 3, 2022 6:05 AM > > To: Piyush Mehta <piyush.mehta@xilinx.com> > > Cc: gregkh@linuxfoundation.org; michal.simek@xilinx.com; linux- > > usb@vger.kernel.org; linux-kernel@vger.kernel.org; git@xilinx.com; > > sivadur@xilinx.com; radheys@xilinx.com > > Subject: Re: [RFC PATCH] usb: chipidea: Add support for VBUS control with > > PHY > > > > CAUTION: This message has originated from an External Source. Please use > > proper judgment and caution when opening attachments, clicking links, or > > responding to this email. > > > > > > On 22-05-24 17:38:02, Piyush Mehta wrote: > > > Some platforms make use of VBUS control over PHY which means > > > controller driver has to access PHY registers to turn on/off VBUS > > > line.This patch adds support for such platforms in chipidea. > > > > > > Flag 'CI_HDRC_PHY_VBUS_CONTROL' added to support VBus control > > feature. > > > > > > Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> > > > --- > > > We have created this patch as RFC, as I introduced a new flag > > > (CI_HDRC_PHY_VBUS_CONTROL) and would like to get comment if it's the > > > proper way to check for VBus support for zynq. > > > --- > > > drivers/usb/chipidea/ci_hdrc_usb2.c | 1 + > > > drivers/usb/chipidea/host.c | 7 +++++++ > > > drivers/usb/chipidea/otg_fsm.c | 7 +++++++ > > > include/linux/usb/chipidea.h | 1 + > > > 4 files changed, 16 insertions(+) > > > > > > diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c > > > b/drivers/usb/chipidea/ci_hdrc_usb2.c > > > index 89e1d82..dc86b12 100644 > > > --- a/drivers/usb/chipidea/ci_hdrc_usb2.c > > > +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c > > > @@ -30,6 +30,7 @@ static const struct ci_hdrc_platform_data > > > ci_default_pdata = { > > > > > > static const struct ci_hdrc_platform_data ci_zynq_pdata = { > > > .capoffset = DEF_CAPOFFSET, > > > + .flags = CI_HDRC_PHY_VBUS_CONTROL, > > > }; > > > > > > static const struct ci_hdrc_platform_data ci_zevio_pdata = { diff > > > --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c > > > index bdc3885..bc3634a 100644 > > > --- a/drivers/usb/chipidea/host.c > > > +++ b/drivers/usb/chipidea/host.c > > > @@ -63,6 +63,13 @@ static int ehci_ci_portpower(struct usb_hcd *hcd, int > > portnum, bool enable) > > > priv->enabled = enable; > > > } > > > > > > + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) { > > > + if (enable) > > > + usb_phy_vbus_on(ci->usb_phy); > > > + else > > > + usb_phy_vbus_off(ci->usb_phy); > > > + } > > > + > > > if (enable && (ci->platdata->phy_mode == > > USBPHY_INTERFACE_MODE_HSIC)) { > > > /* > > > * Marvell 28nm HSIC PHY requires forcing the port to HS mode. > > > diff --git a/drivers/usb/chipidea/otg_fsm.c > > > b/drivers/usb/chipidea/otg_fsm.c index 6ed4b00..5ed9164 100644 > > > --- a/drivers/usb/chipidea/otg_fsm.c > > > +++ b/drivers/usb/chipidea/otg_fsm.c > > > @@ -471,6 +471,10 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, > > int on) > > > return; > > > } > > > } > > > + > > > + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) > > > + usb_phy_vbus_on(ci->usb_phy); > > > + > > > /* Disable data pulse irq */ > > > hw_write_otgsc(ci, OTGSC_DPIE, 0); > > > > > > @@ -480,6 +484,9 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int > > on) > > > if (ci->platdata->reg_vbus) > > > regulator_disable(ci->platdata->reg_vbus); > > > > > > + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) > > > + usb_phy_vbus_off(ci->usb_phy); > > > + > > > > Have your platform used OTG FSM? If not used, do not need to change it. > > Otherwise, it is okay for me. > > > > Peter > > > > > fsm->a_bus_drop = 1; > > > fsm->a_bus_req = 0; > > > } > > > diff --git a/include/linux/usb/chipidea.h > > > b/include/linux/usb/chipidea.h index edf3342..ee38835 100644 > > > --- a/include/linux/usb/chipidea.h > > > +++ b/include/linux/usb/chipidea.h > > > @@ -62,6 +62,7 @@ struct ci_hdrc_platform_data { #define > > > CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) > > > #define CI_HDRC_IMX_IS_HSIC BIT(14) > > > #define CI_HDRC_PMQOS BIT(15) > > > +#define CI_HDRC_PHY_VBUS_CONTROL BIT(16) > > > enum usb_dr_mode dr_mode; > > > #define CI_HDRC_CONTROLLER_RESET_EVENT 0 > > > #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 > > > -- > > > 2.7.4 > > > > > > > -- > > > > Thanks, > > Peter Chen >
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c index 89e1d82..dc86b12 100644 --- a/drivers/usb/chipidea/ci_hdrc_usb2.c +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c @@ -30,6 +30,7 @@ static const struct ci_hdrc_platform_data ci_default_pdata = { static const struct ci_hdrc_platform_data ci_zynq_pdata = { .capoffset = DEF_CAPOFFSET, + .flags = CI_HDRC_PHY_VBUS_CONTROL, }; static const struct ci_hdrc_platform_data ci_zevio_pdata = { diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c index bdc3885..bc3634a 100644 --- a/drivers/usb/chipidea/host.c +++ b/drivers/usb/chipidea/host.c @@ -63,6 +63,13 @@ static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) priv->enabled = enable; } + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) { + if (enable) + usb_phy_vbus_on(ci->usb_phy); + else + usb_phy_vbus_off(ci->usb_phy); + } + if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { /* * Marvell 28nm HSIC PHY requires forcing the port to HS mode. diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c index 6ed4b00..5ed9164 100644 --- a/drivers/usb/chipidea/otg_fsm.c +++ b/drivers/usb/chipidea/otg_fsm.c @@ -471,6 +471,10 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) return; } } + + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) + usb_phy_vbus_on(ci->usb_phy); + /* Disable data pulse irq */ hw_write_otgsc(ci, OTGSC_DPIE, 0); @@ -480,6 +484,9 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) if (ci->platdata->reg_vbus) regulator_disable(ci->platdata->reg_vbus); + if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) + usb_phy_vbus_off(ci->usb_phy); + fsm->a_bus_drop = 1; fsm->a_bus_req = 0; } diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h index edf3342..ee38835 100644 --- a/include/linux/usb/chipidea.h +++ b/include/linux/usb/chipidea.h @@ -62,6 +62,7 @@ struct ci_hdrc_platform_data { #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) #define CI_HDRC_IMX_IS_HSIC BIT(14) #define CI_HDRC_PMQOS BIT(15) +#define CI_HDRC_PHY_VBUS_CONTROL BIT(16) enum usb_dr_mode dr_mode; #define CI_HDRC_CONTROLLER_RESET_EVENT 0 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
Some platforms make use of VBUS control over PHY which means controller driver has to access PHY registers to turn on/off VBUS line.This patch adds support for such platforms in chipidea. Flag 'CI_HDRC_PHY_VBUS_CONTROL' added to support VBus control feature. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> --- We have created this patch as RFC, as I introduced a new flag (CI_HDRC_PHY_VBUS_CONTROL) and would like to get comment if it's the proper way to check for VBus support for zynq. --- drivers/usb/chipidea/ci_hdrc_usb2.c | 1 + drivers/usb/chipidea/host.c | 7 +++++++ drivers/usb/chipidea/otg_fsm.c | 7 +++++++ include/linux/usb/chipidea.h | 1 + 4 files changed, 16 insertions(+)