@@ -1728,10 +1728,14 @@ static void check_speed_bin(struct device *dev)
{
struct nvmem_cell *cell;
u32 val;
+ struct dev_pm_opp_config config = {
+ .supported_hw = &val,
+ .supported_hw_count = 1,
+ };
/*
* If the OPP table specifies a opp-supported-hw property then we have
- * to set something with dev_pm_opp_set_supported_hw() or the table
+ * to set something with dev_pm_opp_set_config() or the table
* doesn't get populated so pick an arbitrary value that should
* ensure the default frequencies are selected but not conflict with any
* actual bins
@@ -1753,7 +1757,7 @@ static void check_speed_bin(struct device *dev)
nvmem_cell_put(cell);
}
- devm_pm_opp_set_supported_hw(dev, &val, 1);
+ devm_pm_opp_set_config(dev, &config);
}
struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
@@ -1805,6 +1805,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
u32 supp_hw = UINT_MAX;
u32 speedbin;
int ret;
+ struct dev_pm_opp_config config = {
+ .supported_hw = &supp_hw,
+ .supported_hw_count = 1,
+ };
ret = adreno_read_speedbin(dev, &speedbin);
/*
@@ -1823,11 +1827,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
done:
- ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
- if (ret)
- return ret;
-
- return 0;
+ return devm_pm_opp_set_config(dev, &config);
}
static const struct adreno_gpu_funcs funcs = {
@@ -1203,12 +1203,15 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
struct drm_device *ddev = priv->dev;
struct dpu_kms *dpu_kms;
int ret = 0;
+ struct dev_pm_opp_config config = {
+ .clk_name = "core",
+ };
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
- ret = devm_pm_opp_set_clkname(dev, "core");
+ ret = devm_pm_opp_set_config(dev, &config);
if (ret)
return ret;
/* OPP table is optional */
@@ -1974,6 +1974,9 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
{
struct dp_ctrl_private *ctrl;
int ret;
+ struct dev_pm_opp_config config = {
+ .clk_name = "ctrl_link",
+ };
if (!dev || !panel || !aux ||
!link || !catalog) {
@@ -1987,7 +1990,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
return ERR_PTR(-ENOMEM);
}
- ret = devm_pm_opp_set_clkname(dev, "ctrl_link");
+ ret = devm_pm_opp_set_config(dev, &config);
if (ret) {
dev_err(dev, "invalid DP OPP table in device tree\n");
/* caller do PTR_ERR(opp_table) */
@@ -1801,6 +1801,9 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
struct msm_dsi_host *msm_host = NULL;
struct platform_device *pdev = msm_dsi->pdev;
int ret;
+ struct dev_pm_opp_config config = {
+ .clk_name = "byte",
+ };
msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL);
if (!msm_host) {
@@ -1862,7 +1865,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
goto fail;
}
- ret = devm_pm_opp_set_clkname(&pdev->dev, "byte");
+ ret = devm_pm_opp_set_config(&pdev->dev, &config);
if (ret)
return ret;
/* OPP table is optional */
The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 ++++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 ++++- drivers/gpu/drm/msm/dp/dp_ctrl.c | 5 ++++- drivers/gpu/drm/msm/dsi/dsi_host.c | 5 ++++- 5 files changed, 23 insertions(+), 10 deletions(-)