diff mbox series

ASoC: Intel: cirrus-common: fix incorrect channel mapping

Message ID 20220530125421.885236-1-brent.lu@intel.com
State New
Headers show
Series ASoC: Intel: cirrus-common: fix incorrect channel mapping | expand

Commit Message

Brent Lu May 30, 2022, 12:54 p.m. UTC 
From: xliu <xiang.liu@cirrus.com>

The default mapping of ASPRX1 Slot is left channel. Map the slots of
right amplifiers (WR and TR) to right channel.

Signed-off-by: xliu <xiang.liu@cirrus.com>
Signed-off-by: Brent Lu <brent.lu@intel.com>
---
 sound/soc/intel/boards/sof_cirrus_common.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)
diff mbox series

Patch

diff --git a/sound/soc/intel/boards/sof_cirrus_common.c b/sound/soc/intel/boards/sof_cirrus_common.c
index e71d74ec1b0b..64ca0e3991dc 100644
--- a/sound/soc/intel/boards/sof_cirrus_common.c
+++ b/sound/soc/intel/boards/sof_cirrus_common.c
@@ -107,6 +107,7 @@  static int cs35l41_hw_params(struct snd_pcm_substream *substream,
 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 	struct snd_soc_dai *codec_dai;
 	int clk_freq, i, ret;
+	int rx_ch[2] = {1, 0};
 
 	clk_freq = sof_dai_get_bclk(rtd); /* BCLK freq */
 
@@ -134,6 +135,17 @@  static int cs35l41_hw_params(struct snd_pcm_substream *substream,
 				ret);
 			return ret;
 		}
+
+		/* Setup for R channel Slot: WR and TR */
+		if (i % 2) {
+			ret = snd_soc_dai_set_channel_map(codec_dai, 0, NULL,
+							  ARRAY_SIZE(rx_ch), rx_ch);
+			if (ret < 0) {
+				dev_err(codec_dai->dev, "fail to set channel map, ret %d\n",
+					ret);
+				return ret;
+			}
+		}
 	}
 
 	return 0;