| Message ID | 1654872335-4993-3-git-send-email-quic_srivasam@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add pinctrl support adsp bypass platforms | expand |
diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index 74810ec..6e03529 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -388,6 +388,9 @@ int lpi_pinctrl_probe(struct platform_device *pdev) pctrl->data = data; pctrl->dev = &pdev->dev; + if (of_property_read_bool(np, "qcom,adsp-bypass-mode")) + data->is_clk_optional = true; + pctrl->clks[0].id = "core"; pctrl->clks[1].id = "audio"; diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c index 2add9a4..3fc7de1 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c @@ -141,7 +141,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { .ngroups = ARRAY_SIZE(sc7280_groups), .functions = sc7280_functions, .nfunctions = ARRAY_SIZE(sc7280_functions), - .is_clk_optional = true, + .is_clk_optional = false, }; static const struct of_device_id lpi_pinctrl_of_match[] = {
Update lpass lpi pin control driver, with clock optional check for ADSP disabled platforms. This check required for distingushing ADSP based platforms and ADSP bypass platforms. In case of ADSP enabled platforms, where audio is routed through ADSP macro and decodec GDSC Switches are triggered as clocks by pinctrl driver and ADSP firmware controls them. So It's mandatory to enable them in ADSP based solutions. In case of ADSP bypass platforms clock voting is optional as these macro and dcodec GDSC switches are maintained as power domains and operated from lpass clock drivers. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 3 +++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-)