@@ -717,6 +717,27 @@
#define RKISP1_CIF_ISP_DPF_SPATIAL_COEFF_MAX 0x1F
#define RKISP1_CIF_ISP_DPF_NLL_COEFF_N_MAX 0x3FF
+/* TPG */
+#define RKISP1_CIF_ISP_TPG_CTRL_ENA BIT(0)
+#define RKISP1_CIF_ISP_TPG_CTRL_IMG_3X3_COLOR_BLOCK (0 << 1)
+#define RKISP1_CIF_ISP_TPG_CTRL_IMG_COLOR_BAR (1 << 1)
+#define RKISP1_CIF_ISP_TPG_CTRL_IMG_GRAY_BAR (2 << 1)
+#define RKISP1_CIF_ISP_TPG_CTRL_IMG_HIGHLIGHT_GRID (3 << 1)
+#define RKISP1_CIF_ISP_TPG_CTRL_IMG_RAND (4 << 1)
+#define RKISP1_CIF_ISP_TPG_CTRL_CFA_RGGB (0 << 4)
+#define RKISP1_CIF_ISP_TPG_CTRL_CFA_GRBG (1 << 4)
+#define RKISP1_CIF_ISP_TPG_CTRL_CFA_GBRB (2 << 4)
+#define RKISP1_CIF_ISP_TPG_CTRL_CFA_BGGR (3 << 4)
+#define RKISP1_CIF_ISP_TPG_CTRL_DEPTH_8 (0 << 6)
+#define RKISP1_CIF_ISP_TPG_CTRL_DEPTH_10 (1 << 6)
+#define RKISP1_CIF_ISP_TPG_CTRL_DEPTH_12 (2 << 6)
+#define RKISP1_CIF_ISP_TPG_CTRL_DEF_SYNC BIT(8)
+#define RKISP1_CIF_ISP_TPG_CTRL_MAX_SYNC BIT(9)
+#define RKISP1_CIF_ISP_TPG_CTRL_SOL_1080P (0 << 10)
+#define RKISP1_CIF_ISP_TPG_CTRL_SOL_720P (1 << 10)
+#define RKISP1_CIF_ISP_TPG_CTRL_SOL_4K (2 << 10)
+#define RKISP1_CIF_ISP_TPG_CTRL_SOL_USER_DEFINED (3 << 10)
+
/* =================================================================== */
/* CIF Registers */
/* =================================================================== */
@@ -912,6 +933,17 @@
#define RKISP1_CIF_ISP_SH_DELAY (RKISP1_CIF_ISP_SH_BASE + 0x00000008)
#define RKISP1_CIF_ISP_SH_TIME (RKISP1_CIF_ISP_SH_BASE + 0x0000000C)
+#define RKISP1_CIF_ISP_TPG_BASE 0x00000700
+#define RKISP1_CIF_ISP_TPG_CTRL (RKISP1_CIF_ISP_TPG_BASE + 0x00000000)
+#define RKISP1_CIF_ISP_TPG_TOTAL_IN (RKISP1_CIF_ISP_TPG_BASE + 0x00000004)
+#define RKISP1_CIF_ISP_TPG_ACT_IN (RKISP1_CIF_ISP_TPG_BASE + 0x00000008)
+#define RKISP1_CIF_ISP_TPG_FP_IN (RKISP1_CIF_ISP_TPG_BASE + 0x0000000C)
+#define RKISP1_CIF_ISP_TPG_BP_IN (RKISP1_CIF_ISP_TPG_BASE + 0x00000010)
+#define RKISP1_CIF_ISP_TPG_W_IN (RKISP1_CIF_ISP_TPG_BASE + 0x00000014)
+#define RKISP1_CIF_ISP_TPG_GAP_IN (RKISP1_CIF_ISP_TPG_BASE + 0x00000018)
+#define RKISP1_CIF_ISP_TPG_GAP_STD_IN (RKISP1_CIF_ISP_TPG_BASE + 0x0000001C)
+#define RKISP1_CIF_ISP_TPG_RANDOM_SEED_IN (RKISP1_CIF_ISP_TPG_BASE + 0x00000020)
+
#define RKISP1_CIF_C_PROC_BASE 0x00000800
#define RKISP1_CIF_C_PROC_CTRL (RKISP1_CIF_C_PROC_BASE + 0x00000000)
#define RKISP1_CIF_C_PROC_CONTRAST (RKISP1_CIF_C_PROC_BASE + 0x00000004)
Add register definitions and value macros for the test pattern generator block in the ISP. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> --- .../platform/rockchip/rkisp1/rkisp1-regs.h | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+)