diff mbox series

[2/5] drm/msm/mdss: enable optional core clock for MDP5 MDSS

Message ID 20220615135935.87381-2-dmitry.baryshkov@linaro.org
State New
Headers show
Series [1/5] drm/msm: less magic numbers in msm_mdss_enable | expand

Commit Message

Dmitry Baryshkov June 15, 2022, 1:59 p.m. UTC
Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
registers during the platform init.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/msm_mdss.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Luca Weiss June 18, 2022, 2:23 p.m. UTC | #1
Hi Dmitry,

On Mittwoch, 15. Juni 2022 15:59:32 CEST Dmitry Baryshkov wrote:
> Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
> registers during the platform init.
> 

I believe you also need to update Documentation/devicetree/bindings/display/
msm/mdp5.txt with the new clock.

Regards
Luca

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  drivers/gpu/drm/msm/msm_mdss.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index b41848bfff91..f7b4628986b8 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -288,7 +288,7 @@ static int msm_mdss_reset(struct device *dev)
>  /*
>   * MDP5 MDSS uses at most three specified clocks.
>   */
> -#define MDP5_MDSS_NUM_CLOCKS 3
> +#define MDP5_MDSS_NUM_CLOCKS 4
>  static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct
> clk_bulk_data **clocks) {
>  	struct clk_bulk_data *bulk;
> @@ -305,6 +305,7 @@ static int mdp5_mdss_parse_clock(struct platform_device
> *pdev, struct clk_bulk_d bulk[num_clocks++].id = "iface";
>  	bulk[num_clocks++].id = "bus";
>  	bulk[num_clocks++].id = "vsync";
> +	bulk[num_clocks++].id = "core"; /* for hw_rev access */
> 
>  	ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
>  	if (ret)
Dmitry Baryshkov June 18, 2022, 3:26 p.m. UTC | #2
On Sat, 18 Jun 2022 at 17:24, Luca Weiss <luca@z3ntu.xyz> wrote:
>
> Hi Dmitry,
>
> On Mittwoch, 15. Juni 2022 15:59:32 CEST Dmitry Baryshkov wrote:
> > Enable (optional) core (MDP_CLK) clock that allows accessing HW_REV
> > registers during the platform init.
> >
>
> I believe you also need to update Documentation/devicetree/bindings/display/
> msm/mdp5.txt with the new clock.

I'm working on converting it to the yaml format.

>
> Regards
> Luca
>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> >  drivers/gpu/drm/msm/msm_mdss.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> > index b41848bfff91..f7b4628986b8 100644
> > --- a/drivers/gpu/drm/msm/msm_mdss.c
> > +++ b/drivers/gpu/drm/msm/msm_mdss.c
> > @@ -288,7 +288,7 @@ static int msm_mdss_reset(struct device *dev)
> >  /*
> >   * MDP5 MDSS uses at most three specified clocks.
> >   */
> > -#define MDP5_MDSS_NUM_CLOCKS 3
> > +#define MDP5_MDSS_NUM_CLOCKS 4
> >  static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct
> > clk_bulk_data **clocks) {
> >       struct clk_bulk_data *bulk;
> > @@ -305,6 +305,7 @@ static int mdp5_mdss_parse_clock(struct platform_device
> > *pdev, struct clk_bulk_d bulk[num_clocks++].id = "iface";
> >       bulk[num_clocks++].id = "bus";
> >       bulk[num_clocks++].id = "vsync";
> > +     bulk[num_clocks++].id = "core"; /* for hw_rev access */
> >
> >       ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
> >       if (ret)
>
>
>
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index b41848bfff91..f7b4628986b8 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -288,7 +288,7 @@  static int msm_mdss_reset(struct device *dev)
 /*
  * MDP5 MDSS uses at most three specified clocks.
  */
-#define MDP5_MDSS_NUM_CLOCKS 3
+#define MDP5_MDSS_NUM_CLOCKS 4
 static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **clocks)
 {
 	struct clk_bulk_data *bulk;
@@ -305,6 +305,7 @@  static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_d
 	bulk[num_clocks++].id = "iface";
 	bulk[num_clocks++].id = "bus";
 	bulk[num_clocks++].id = "vsync";
+	bulk[num_clocks++].id = "core"; /* for hw_rev access */
 
 	ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
 	if (ret)