| Message ID | 20220620200644.1961936-43-aidanmacdonald.0x0@gmail.com |
|---|---|
| State | Accepted |
| Commit | 172a293707a55ba62e55a386eb601c8ef4824c85 |
| Headers | show
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From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
To: broonie@kernel.org
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
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Subject: [PATCH 42/49] mfd: qcom-pm8008: Fix broken mask/unmask in irq chip
Date: Mon, 20 Jun 2022 21:06:37 +0100
Message-Id: <20220620200644.1961936-43-aidanmacdonald.0x0@gmail.com>
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|
| Series |
regmap-irq cleanups and refactoring
|
expand
|
diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 18095e72714e..7bc6becfe7f4 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -45,8 +45,8 @@ enum { #define PM8008_GPIO2_ADDR PM8008_PERIPH_3_BASE #define PM8008_STATUS_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_STS_OFFSET) -#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) -#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) +#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) +#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) #define PM8008_TYPE_BASE (PM8008_PERIPH_0_BASE | INT_SET_TYPE_OFFSET) #define PM8008_ACK_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_CLR_OFFSET) #define PM8008_POLARITY_HI_BASE (PM8008_PERIPH_0_BASE | INT_POL_HIGH_OFFSET) @@ -141,7 +141,6 @@ static struct regmap_irq_chip pm8008_irq_chip = { .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, - .broken_mask_unmask = true, .ack_base = PM8008_ACK_BASE, .config_base = pm8008_config_regs, .num_config_bases = ARRAY_SIZE(pm8008_config_regs),
Swap mask_base and unmask_base, and drop the broken_mask_unmask flag since we're now expecting the registers to have their usual behavior. Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> --- drivers/mfd/qcom-pm8008.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)