@@ -10,151 +10,78 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7180 target.
+ Device tree bindings for the DPU display controller for SC7180 target.
properties:
compatible:
items:
- - const: qcom,sc7180-mdss
+ - const: qcom,sc7180-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
+ - description: Display hf axi clock
+ - description: Display ahb clock
+ - description: Display rotator clock
+ - description: Display lut clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
+ - const: bus
- const: iface
- - const: ahb
+ - const: rot
+ - const: lut
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,sc7180-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display ahb clock
- - description: Display rotator clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: rot
- - const: lut
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF0 (DP)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
@@ -188,7 +115,7 @@ examples:
iommus = <&apps_smmu 0x800 0x2>;
ranges;
- display-controller@ae01000 {
+ mdp@ae01000 {
compatible = "qcom,sc7180-dpu";
reg = <0x0ae01000 0x8f000>,
<0x0aeb0000 0x2008>;
@@ -18,6 +18,7 @@ description: |
properties:
compatible:
enum:
+ - qcom,sc7180-mdss
- qcom,sdm845-mdss
- qcom,mdss
@@ -65,20 +66,21 @@ properties:
- description: MDSS_CORE reset
interconnects:
- minItems: 2
+ minItems: 1
items:
- description: MDP port 0
- description: MDP port 1
- description: Rotator
interconnect-names:
- minItems: 2
+ minItems: 1
items:
- const: mdp0-mem
- const: mdp1-mem
- const: rotator-mem
iommus:
+ minItems: 1
items:
- description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
@@ -108,9 +110,11 @@ allOf:
- const: mdss
interconnects:
+ minItems: 1
maxItems: 2
interconnect-names:
+ minItems: 1
maxItems: 2
required:
@@ -154,6 +158,32 @@ allOf:
- const: iface
- const: core
+ iommus:
+ minItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7180-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -175,8 +205,19 @@ patternProperties:
compatible:
enum:
- qcom,mdp5
+ - qcom,sc7180-dpu
- qcom,sdm845-dpu
+ "^displayport-controller@(0|[1-9a-f][0-9a-f]*)$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7180-dp
+ - qcom,sc7280-dp
+ - qcom,sc8180x-dp
+ - qcom,sm8350-dp
+
"^dsi@(0|[1-9a-f][0-9a-f]*)$":
type: object
properties:
Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so that the dpu file describes only the DPU schema. While we are at it, rename display-controller node to mdp to reflect actual node name in the sc7180.dtsi file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../bindings/display/msm/dpu-sc7180.yaml | 151 +++++------------- .../devicetree/bindings/display/msm/mdss.yaml | 45 +++++- 2 files changed, 82 insertions(+), 114 deletions(-)