| Message ID | 20220628042117.368549-8-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: Scalable Matrix Extension | expand |
On Tue, 28 Jun 2022 at 05:28, Richard Henderson <richard.henderson@linaro.org> wrote: > > Mark these as a non-streaming instructions, which should trap > if full a64 support is not enabled in streaming mode. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/sme-fa64.decode | 2 -- > target/arm/translate-sve.c | 18 ++++++++++-------- > 2 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode > index c25bad5ee5..c75a94e0fc 100644 > --- a/target/arm/sme-fa64.decode > +++ b/target/arm/sme-fa64.decode > @@ -58,8 +58,6 @@ FAIL 1100 1110 ---- ---- ---- ---- ---- ---- # Advanced SIMD cryptography e > # --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset) > # --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm) > > -FAIL 0100 0101 000- ---- 0110 1--- ---- ---- # PMULLB, PMULLT (128b result) This encoding pattern (as the comment says) covers only the esize = 128 case... > -TRANS_FEAT(PMULLB, aa64_sve2, do_trans_pmull, a, false) > -TRANS_FEAT(PMULLT, aa64_sve2, do_trans_pmull, a, true) > +TRANS_FEAT_NONSTREAMING(PMULLB, aa64_sve2, do_trans_pmull, a, false) > +TRANS_FEAT_NONSTREAMING(PMULLT, aa64_sve2, do_trans_pmull, a, true) ..but these trans functions cover all the esize values. In the pseudocode for PMULLB/PMULLT it explicitly does if esize < 128 then CheckSVEEnabled(); else CheckNonStreamingSVEEnabled(); so it is definitely intended to distinguish the 128 bit case from the 16 and 64 bit ones. thanks -- PMM
On 7/1/22 17:48, Peter Maydell wrote: > On Tue, 28 Jun 2022 at 05:28, Richard Henderson > <richard.henderson@linaro.org> wrote: >> >> Mark these as a non-streaming instructions, which should trap >> if full a64 support is not enabled in streaming mode. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> target/arm/sme-fa64.decode | 2 -- >> target/arm/translate-sve.c | 18 ++++++++++-------- >> 2 files changed, 10 insertions(+), 10 deletions(-) >> >> diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode >> index c25bad5ee5..c75a94e0fc 100644 >> --- a/target/arm/sme-fa64.decode >> +++ b/target/arm/sme-fa64.decode >> @@ -58,8 +58,6 @@ FAIL 1100 1110 ---- ---- ---- ---- ---- ---- # Advanced SIMD cryptography e >> # --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset) >> # --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm) >> >> -FAIL 0100 0101 000- ---- 0110 1--- ---- ---- # PMULLB, PMULLT (128b result) > > This encoding pattern (as the comment says) covers only the esize = 128 case... > >> -TRANS_FEAT(PMULLB, aa64_sve2, do_trans_pmull, a, false) >> -TRANS_FEAT(PMULLT, aa64_sve2, do_trans_pmull, a, true) >> +TRANS_FEAT_NONSTREAMING(PMULLB, aa64_sve2, do_trans_pmull, a, false) >> +TRANS_FEAT_NONSTREAMING(PMULLT, aa64_sve2, do_trans_pmull, a, true) > > ..but these trans functions cover all the esize values. > > In the pseudocode for PMULLB/PMULLT it explicitly does > if esize < 128 then CheckSVEEnabled(); else CheckNonStreamingSVEEnabled(); > so it is definitely intended to distinguish the 128 bit case > from the 16 and 64 bit ones. Whoops, too right. r~
diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode index c25bad5ee5..c75a94e0fc 100644 --- a/target/arm/sme-fa64.decode +++ b/target/arm/sme-fa64.decode @@ -58,8 +58,6 @@ FAIL 1100 1110 ---- ---- ---- ---- ---- ---- # Advanced SIMD cryptography e # --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset) # --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm) -FAIL 0100 0101 000- ---- 0110 1--- ---- ---- # PMULLB, PMULLT (128b result) -FAIL 0110 0100 --1- ---- 1110 01-- ---- ---- # FMMLA, BFMMLA FAIL 0110 0101 --0- ---- 0000 11-- ---- ---- # FTSMUL FAIL 0110 0101 --01 0--- 100- ---- ---- ---- # FTMAD FAIL 0110 0101 --01 1--- 001- ---- ---- ---- # FADDA diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index ae48040aa4..130432654e 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -6194,8 +6194,8 @@ static bool do_trans_pmull(DisasContext *s, arg_rrr_esz *a, bool sel) return gen_gvec_ool_arg_zzz(s, fns[a->esz], a, sel); } -TRANS_FEAT(PMULLB, aa64_sve2, do_trans_pmull, a, false) -TRANS_FEAT(PMULLT, aa64_sve2, do_trans_pmull, a, true) +TRANS_FEAT_NONSTREAMING(PMULLB, aa64_sve2, do_trans_pmull, a, false) +TRANS_FEAT_NONSTREAMING(PMULLT, aa64_sve2, do_trans_pmull, a, true) static gen_helper_gvec_3 * const saddw_fns[4] = { NULL, gen_helper_sve2_saddw_h, @@ -7125,10 +7125,12 @@ DO_ZPZZ_FP(FMINP, aa64_sve2, sve2_fminp_zpzz) * SVE Integer Multiply-Add (unpredicated) */ -TRANS_FEAT(FMMLA_s, aa64_sve_f32mm, gen_gvec_fpst_zzzz, gen_helper_fmmla_s, - a->rd, a->rn, a->rm, a->ra, 0, FPST_FPCR) -TRANS_FEAT(FMMLA_d, aa64_sve_f64mm, gen_gvec_fpst_zzzz, gen_helper_fmmla_d, - a->rd, a->rn, a->rm, a->ra, 0, FPST_FPCR) +TRANS_FEAT_NONSTREAMING(FMMLA_s, aa64_sve_f32mm, gen_gvec_fpst_zzzz, + gen_helper_fmmla_s, a->rd, a->rn, a->rm, a->ra, + 0, FPST_FPCR) +TRANS_FEAT_NONSTREAMING(FMMLA_d, aa64_sve_f64mm, gen_gvec_fpst_zzzz, + gen_helper_fmmla_d, a->rd, a->rn, a->rm, a->ra, + 0, FPST_FPCR) static gen_helper_gvec_4 * const sqdmlal_zzzw_fns[] = { NULL, gen_helper_sve2_sqdmlal_zzzw_h, @@ -7301,8 +7303,8 @@ TRANS_FEAT(BFDOT_zzzz, aa64_sve_bf16, gen_gvec_ool_arg_zzzz, TRANS_FEAT(BFDOT_zzxz, aa64_sve_bf16, gen_gvec_ool_arg_zzxz, gen_helper_gvec_bfdot_idx, a) -TRANS_FEAT(BFMMLA, aa64_sve_bf16, gen_gvec_ool_arg_zzzz, - gen_helper_gvec_bfmmla, a, 0) +TRANS_FEAT_NONSTREAMING(BFMMLA, aa64_sve_bf16, gen_gvec_ool_arg_zzzz, + gen_helper_gvec_bfmmla, a, 0) static bool do_BFMLAL_zzzw(DisasContext *s, arg_rrrr_esz *a, bool sel) {
Mark these as a non-streaming instructions, which should trap if full a64 support is not enabled in streaming mode. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/sme-fa64.decode | 2 -- target/arm/translate-sve.c | 18 ++++++++++-------- 2 files changed, 10 insertions(+), 10 deletions(-)