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[PULL,00/45] target-arm queue

Message ID 20220711135750.765803-1-peter.maydell@linaro.org
State Not Applicable
Headers show

Pull-request

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220711

Message

Peter Maydell July 11, 2022, 1:57 p.m. UTC 
I don't have anything else queued up at the moment, so this is just
Richard's SME patches.

-- PMM

The following changes since commit 63b38f6c85acd312c2cab68554abf33adf4ee2b3:

  Merge tag 'pull-target-arm-20220707' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-07-08 06:17:11 +0530)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220711

for you to fetch changes up to f9982ceaf26df27d15547a3a7990a95019e9e3a8:

  linux-user/aarch64: Add SME related hwcap entries (2022-07-11 13:43:52 +0100)

----------------------------------------------------------------
target-arm:
 * Implement SME emulation, for both system and linux-user

----------------------------------------------------------------
Richard Henderson (45):
      target/arm: Handle SME in aarch64_cpu_dump_state
      target/arm: Add infrastructure for disas_sme
      target/arm: Trap non-streaming usage when Streaming SVE is active
      target/arm: Mark ADR as non-streaming
      target/arm: Mark RDFFR, WRFFR, SETFFR as non-streaming
      target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL as non-streaming
      target/arm: Mark PMULL, FMMLA as non-streaming
      target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming
      target/arm: Mark SMMLA, UMMLA, USMMLA as non-streaming
      target/arm: Mark string/histo/crypto as non-streaming
      target/arm: Mark gather/scatter load/store as non-streaming
      target/arm: Mark gather prefetch as non-streaming
      target/arm: Mark LDFF1 and LDNF1 as non-streaming
      target/arm: Mark LD1RO as non-streaming
      target/arm: Add SME enablement checks
      target/arm: Handle SME in sve_access_check
      target/arm: Implement SME RDSVL, ADDSVL, ADDSPL
      target/arm: Implement SME ZERO
      target/arm: Implement SME MOVA
      target/arm: Implement SME LD1, ST1
      target/arm: Export unpredicated ld/st from translate-sve.c
      target/arm: Implement SME LDR, STR
      target/arm: Implement SME ADDHA, ADDVA
      target/arm: Implement FMOPA, FMOPS (non-widening)
      target/arm: Implement BFMOPA, BFMOPS
      target/arm: Implement FMOPA, FMOPS (widening)
      target/arm: Implement SME integer outer product
      target/arm: Implement PSEL
      target/arm: Implement REVD
      target/arm: Implement SCLAMP, UCLAMP
      target/arm: Reset streaming sve state on exception boundaries
      target/arm: Enable SME for -cpu max
      linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS
      linux-user/aarch64: Reset PSTATE.SM on syscalls
      linux-user/aarch64: Add SM bit to SVE signal context
      linux-user/aarch64: Tidy target_restore_sigframe error return
      linux-user/aarch64: Do not allow duplicate or short sve records
      linux-user/aarch64: Verify extra record lock succeeded
      linux-user/aarch64: Move sve record checks into restore
      linux-user/aarch64: Implement SME signal handling
      linux-user: Rename sve prctls
      linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL
      target/arm: Only set ZEN in reset if SVE present
      target/arm: Enable SME for user-only
      linux-user/aarch64: Add SME related hwcap entries

 docs/system/arm/emulation.rst     |    4 +
 linux-user/aarch64/target_cpu.h   |    5 +-
 linux-user/aarch64/target_prctl.h |   62 +-
 target/arm/cpu.h                  |    7 +
 target/arm/helper-sme.h           |  126 ++++
 target/arm/helper-sve.h           |    4 +
 target/arm/helper.h               |   18 +
 target/arm/translate-a64.h        |   45 ++
 target/arm/translate.h            |   16 +
 target/arm/sme-fa64.decode        |   60 ++
 target/arm/sme.decode             |   88 +++
 target/arm/sve.decode             |   41 +-
 linux-user/aarch64/cpu_loop.c     |    9 +
 linux-user/aarch64/signal.c       |  243 ++++++--
 linux-user/elfload.c              |   20 +
 linux-user/syscall.c              |   28 +-
 target/arm/cpu.c                  |   35 +-
 target/arm/cpu64.c                |   11 +
 target/arm/helper.c               |   56 +-
 target/arm/sme_helper.c           | 1140 +++++++++++++++++++++++++++++++++++++
 target/arm/sve_helper.c           |   28 +
 target/arm/translate-a64.c        |  103 +++-
 target/arm/translate-sme.c        |  373 ++++++++++++
 target/arm/translate-sve.c        |  393 ++++++++++---
 target/arm/translate-vfp.c        |   12 +
 target/arm/translate.c            |    2 +
 target/arm/vec_helper.c           |   24 +
 target/arm/meson.build            |    3 +
 28 files changed, 2821 insertions(+), 135 deletions(-)
 create mode 100644 target/arm/sme-fa64.decode
 create mode 100644 target/arm/sme.decode
 create mode 100644 target/arm/translate-sme.c

Comments

Richard Henderson July 12, 2022, 2:16 a.m. UTC | #1 
On 7/11/22 19:27, Peter Maydell wrote:
> I don't have anything else queued up at the moment, so this is just
> Richard's SME patches.
> 
> -- PMM
> 
> The following changes since commit 63b38f6c85acd312c2cab68554abf33adf4ee2b3:
> 
>    Merge tag 'pull-target-arm-20220707' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-07-08 06:17:11 +0530)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220711
> 
> for you to fetch changes up to f9982ceaf26df27d15547a3a7990a95019e9e3a8:
> 
>    linux-user/aarch64: Add SME related hwcap entries (2022-07-11 13:43:52 +0100)
> 
> ----------------------------------------------------------------
> target-arm:
>   * Implement SME emulation, for both system and linux-user

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.


r~


> 
> ----------------------------------------------------------------
> Richard Henderson (45):
>        target/arm: Handle SME in aarch64_cpu_dump_state
>        target/arm: Add infrastructure for disas_sme
>        target/arm: Trap non-streaming usage when Streaming SVE is active
>        target/arm: Mark ADR as non-streaming
>        target/arm: Mark RDFFR, WRFFR, SETFFR as non-streaming
>        target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL as non-streaming
>        target/arm: Mark PMULL, FMMLA as non-streaming
>        target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming
>        target/arm: Mark SMMLA, UMMLA, USMMLA as non-streaming
>        target/arm: Mark string/histo/crypto as non-streaming
>        target/arm: Mark gather/scatter load/store as non-streaming
>        target/arm: Mark gather prefetch as non-streaming
>        target/arm: Mark LDFF1 and LDNF1 as non-streaming
>        target/arm: Mark LD1RO as non-streaming
>        target/arm: Add SME enablement checks
>        target/arm: Handle SME in sve_access_check
>        target/arm: Implement SME RDSVL, ADDSVL, ADDSPL
>        target/arm: Implement SME ZERO
>        target/arm: Implement SME MOVA
>        target/arm: Implement SME LD1, ST1
>        target/arm: Export unpredicated ld/st from translate-sve.c
>        target/arm: Implement SME LDR, STR
>        target/arm: Implement SME ADDHA, ADDVA
>        target/arm: Implement FMOPA, FMOPS (non-widening)
>        target/arm: Implement BFMOPA, BFMOPS
>        target/arm: Implement FMOPA, FMOPS (widening)
>        target/arm: Implement SME integer outer product
>        target/arm: Implement PSEL
>        target/arm: Implement REVD
>        target/arm: Implement SCLAMP, UCLAMP
>        target/arm: Reset streaming sve state on exception boundaries
>        target/arm: Enable SME for -cpu max
>        linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS
>        linux-user/aarch64: Reset PSTATE.SM on syscalls
>        linux-user/aarch64: Add SM bit to SVE signal context
>        linux-user/aarch64: Tidy target_restore_sigframe error return
>        linux-user/aarch64: Do not allow duplicate or short sve records
>        linux-user/aarch64: Verify extra record lock succeeded
>        linux-user/aarch64: Move sve record checks into restore
>        linux-user/aarch64: Implement SME signal handling
>        linux-user: Rename sve prctls
>        linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL
>        target/arm: Only set ZEN in reset if SVE present
>        target/arm: Enable SME for user-only
>        linux-user/aarch64: Add SME related hwcap entries
> 
>   docs/system/arm/emulation.rst     |    4 +
>   linux-user/aarch64/target_cpu.h   |    5 +-
>   linux-user/aarch64/target_prctl.h |   62 +-
>   target/arm/cpu.h                  |    7 +
>   target/arm/helper-sme.h           |  126 ++++
>   target/arm/helper-sve.h           |    4 +
>   target/arm/helper.h               |   18 +
>   target/arm/translate-a64.h        |   45 ++
>   target/arm/translate.h            |   16 +
>   target/arm/sme-fa64.decode        |   60 ++
>   target/arm/sme.decode             |   88 +++
>   target/arm/sve.decode             |   41 +-
>   linux-user/aarch64/cpu_loop.c     |    9 +
>   linux-user/aarch64/signal.c       |  243 ++++++--
>   linux-user/elfload.c              |   20 +
>   linux-user/syscall.c              |   28 +-
>   target/arm/cpu.c                  |   35 +-
>   target/arm/cpu64.c                |   11 +
>   target/arm/helper.c               |   56 +-
>   target/arm/sme_helper.c           | 1140 +++++++++++++++++++++++++++++++++++++
>   target/arm/sve_helper.c           |   28 +
>   target/arm/translate-a64.c        |  103 +++-
>   target/arm/translate-sme.c        |  373 ++++++++++++
>   target/arm/translate-sve.c        |  393 ++++++++++---
>   target/arm/translate-vfp.c        |   12 +
>   target/arm/translate.c            |    2 +
>   target/arm/vec_helper.c           |   24 +
>   target/arm/meson.build            |    3 +
>   28 files changed, 2821 insertions(+), 135 deletions(-)
>   create mode 100644 target/arm/sme-fa64.decode
>   create mode 100644 target/arm/sme.decode
>   create mode 100644 target/arm/translate-sme.c
>