| Message ID | 20220727033123.304-1-chevron.li@bayhubtech.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [V1,1/1] mmc:sdhci-pci-o2micro:fix some SD cards compatibility issue at ddr50 mode | expand |
Just be aware that cards may support one but not the other, so this doesn't come without cost. -----Original Message----- From: Chevron Li <chevron.li@bayhubtech.com> Sent: Mittwoch, 27. Juli 2022 05:31 To: adrian.hunter@intel.com; ulf.hansson@linaro.org; linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org Cc: shaper.liu@bayhubtech.com; shirley.her@bayhubtech.com; xiaoguang.yu@bayhubtech.com Subject: [PATCH V1 1/1] mmc:sdhci-pci-o2micro:fix some SD cards compatibility issue at ddr50 mode Bayhub chips have better compatibility support for sdr50 than ddr50 and both mode have the same R/W performance. Disable ddr50 mode and use sdr50 instead. Signed-off-by: Chevron Li<chevron.li@bayhubtech.com> --- Changes on V1: 1.Set quirks2 flag SDHCI_QUIRK2_BROKEN_DDR50 for bayhub chips. 2.Use bayhub hardware input tuning for SDR50 mode instead of standard tuning flow. --- drivers/mmc/host/sdhci-pci-o2micro.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c index 0d4d343dbb77..ad457cd9cbaa 100644 --- a/drivers/mmc/host/sdhci-pci-o2micro.c +++ b/drivers/mmc/host/sdhci-pci-o2micro.c @@ -317,11 +317,12 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) u32 reg_val; /* - * This handler only implements the eMMC tuning that is specific to + * This handler implements the hardware tuning that is specific to * this controller. Fall back to the standard method for other TIMING. */ if ((host->timing != MMC_TIMING_MMC_HS200) && - (host->timing != MMC_TIMING_UHS_SDR104)) + (host->timing != MMC_TIMING_UHS_SDR104) && + (host->timing != MMC_TIMING_UHS_SDR50)) return sdhci_execute_tuning(mmc, opcode); if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) && @@ -631,6 +632,8 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) if (reg & 0x1) host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; + host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50; + sdhci_pci_o2_enable_msi(chip, host); if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) { base-commit: 68e77ffbfd06ae3ef8f2abf1c3b971383c866983 -- 2.32.0 Hyperstone GmbH | Reichenaustr. 39a | 78467 Konstanz Managing Director: Dr. Jan Peter Berns. Commercial register of local courts: Freiburg HRB381782
diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c index 0d4d343dbb77..ad457cd9cbaa 100644 --- a/drivers/mmc/host/sdhci-pci-o2micro.c +++ b/drivers/mmc/host/sdhci-pci-o2micro.c @@ -317,11 +317,12 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) u32 reg_val; /* - * This handler only implements the eMMC tuning that is specific to + * This handler implements the hardware tuning that is specific to * this controller. Fall back to the standard method for other TIMING. */ if ((host->timing != MMC_TIMING_MMC_HS200) && - (host->timing != MMC_TIMING_UHS_SDR104)) + (host->timing != MMC_TIMING_UHS_SDR104) && + (host->timing != MMC_TIMING_UHS_SDR50)) return sdhci_execute_tuning(mmc, opcode); if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) && @@ -631,6 +632,8 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) if (reg & 0x1) host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; + host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50; + sdhci_pci_o2_enable_msi(chip, host); if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {
Bayhub chips have better compatibility support for sdr50 than ddr50 and both mode have the same R/W performance. Disable ddr50 mode and use sdr50 instead. Signed-off-by: Chevron Li<chevron.li@bayhubtech.com> --- Changes on V1: 1.Set quirks2 flag SDHCI_QUIRK2_BROKEN_DDR50 for bayhub chips. 2.Use bayhub hardware input tuning for SDR50 mode instead of standard tuning flow. --- drivers/mmc/host/sdhci-pci-o2micro.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) base-commit: 68e77ffbfd06ae3ef8f2abf1c3b971383c866983