| Message ID | 20220803015512.25472-1-sherry.sun@nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tty: serial: lpuart: disable flow control when wait transmit engine complete | expand |
On 03. 08. 22, 3:55, Sherry Sun wrote: > When TX fifo has dirty data, user initialize the port and wait transmit > engine complete, it should disable the flow control, otherwise tx fifo > never be empty. Sorry I cannot parse the above. Care to rephrase? (And maybe spellcheck?) > Signed-off-by: Sherry Sun <sherry.sun@nxp.com> > --- > drivers/tty/serial/fsl_lpuart.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c > index fc7d235a1e27..f0fccd2ff7ac 100644 > --- a/drivers/tty/serial/fsl_lpuart.c > +++ b/drivers/tty/serial/fsl_lpuart.c > @@ -2172,6 +2172,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios, > uart_update_timeout(port, termios->c_cflag, baud); > > /* wait transmit engin complete */ > + lpuart32_write(&sport->port, 0, UARTMODIR); > lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); > > /* disable transmit and receive */ thanks,
> On 03. 08. 22, 3:55, Sherry Sun wrote: > > When TX fifo has dirty data, user initialize the port and wait > > transmit engine complete, it should disable the flow control, > > otherwise tx fifo never be empty. > > Sorry I cannot parse the above. Care to rephrase? (And maybe spellcheck?) Hi Jiri, sure, maybe some grammatical errors in the commit log, I can send V2 for your check. Thanks! Best regards Sherry > > > Signed-off-by: Sherry Sun <sherry.sun@nxp.com> > > --- > > drivers/tty/serial/fsl_lpuart.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/tty/serial/fsl_lpuart.c > > b/drivers/tty/serial/fsl_lpuart.c index fc7d235a1e27..f0fccd2ff7ac > > 100644 > > --- a/drivers/tty/serial/fsl_lpuart.c > > +++ b/drivers/tty/serial/fsl_lpuart.c > > @@ -2172,6 +2172,7 @@ lpuart32_set_termios(struct uart_port *port, > struct ktermios *termios, > > uart_update_timeout(port, termios->c_cflag, baud); > > > > /* wait transmit engin complete */ > > + lpuart32_write(&sport->port, 0, UARTMODIR); > > lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); > > > > /* disable transmit and receive */ > > thanks, > -- > js > suse labs
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index fc7d235a1e27..f0fccd2ff7ac 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -2172,6 +2172,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios, uart_update_timeout(port, termios->c_cflag, baud); /* wait transmit engin complete */ + lpuart32_write(&sport->port, 0, UARTMODIR); lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); /* disable transmit and receive */
When TX fifo has dirty data, user initialize the port and wait transmit engine complete, it should disable the flow control, otherwise tx fifo never be empty. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> --- drivers/tty/serial/fsl_lpuart.c | 1 + 1 file changed, 1 insertion(+)