diff mbox series

[v3,7/9] clk: qcom: apss-ipq-pll: add support for IPQ8074

Message ID 20220818220628.339366-7-robimarko@gmail.com
State Accepted
Commit cca7b7d5f168dc0da83429e4f5c0bfbd53c9a456
Headers show
Series [v3,1/9] clk: qcom: clk-rcg2: add rcg2 mux ops | expand

Commit Message

Robert Marko Aug. 18, 2022, 10:06 p.m. UTC 
Add support for IPQ8074 since it uses the same PLL setup, however it uses
slightly different Alpha PLL config.

Alpha PLL config was obtained by dumping PLL registers from a running
device.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
Changes in v2:
* Drop hardcoded compatible check for IPQ6018 to do the PLL config and
utilize match data provided by previous commit
* Add IPQ8074 Alpha PLL config using match data
* Update commit description to reflect changes
---
 drivers/clk/qcom/apss-ipq-pll.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index a4016f3854c2..a5aea27eb867 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -49,6 +49,18 @@  static const struct alpha_pll_config ipq6018_pll_config = {
 	.test_ctl_hi_val = 0x4000,
 };
 
+static const struct alpha_pll_config ipq8074_pll_config = {
+	.l = 0x48,
+	.config_ctl_val = 0x200d4828,
+	.config_ctl_hi_val = 0x6,
+	.early_output_mask = BIT(3),
+	.aux2_output_mask = BIT(2),
+	.aux_output_mask = BIT(1),
+	.main_output_mask = BIT(0),
+	.test_ctl_val = 0x1c000000,
+	.test_ctl_hi_val = 0x4000,
+};
+
 static const struct regmap_config ipq_pll_regmap_config = {
 	.reg_bits		= 32,
 	.reg_stride		= 4,
@@ -89,6 +101,7 @@  static int apss_ipq_pll_probe(struct platform_device *pdev)
 
 static const struct of_device_id apss_ipq_pll_match_table[] = {
 	{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config },
+	{ .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_config },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);