@@ -21,15 +21,23 @@ description: |
properties:
compatible:
- enum:
- - renesas,fcpv # FCP for VSP
- - renesas,fcpf # FCP for FDP
+ oneOf:
+ - items:
+ - enum:
+ - renesas,fcpv # FCP for VSP
+ - renesas,fcpf # FCP for FDP
+
+ - items:
+ - enum:
+ - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
+ - renesas,r9a07g054-fcpvd # RZ/V2L
+ - const: renesas,fcpv # generic FCP for VSP fallback
reg:
maxItems: 1
- clocks:
- maxItems: 1
+ clocks: true
+ clock-names: true
iommus:
maxItems: 1
@@ -49,6 +57,34 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,r9a07g044-fcpvd
+ - renesas,r9a07g054-fcpvd
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Main clock
+ - description: Register access clock
+ - description: Video clock
+ clock-names:
+ items:
+ - const: aclk
+ - const: pclk
+ - const: vclk
+ required:
+ - clock-names
+ else:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
examples:
# R8A7795 (R-Car H3) FCP for VSP-D1
- |
Document FCPVD found in RZ/G2L alike SoCs. FCPVD block is similar to FCP for VSP found on R-Car SoC's . It has 3 clocks compared to 1 clock on fcpv. Introduce new compatibles renesas,r9a07g044-fcpvd for RZ/G2{L,LC} and renesas,r9a07g054-fcpvd for RZ/V2L to handle this difference. The 3 clocks are shared between du, vspd and fcpvd. Update the bindings to reflect this. No driver changes are required as generic compatible string "renesas,fcpv" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v1->v2: * Documented RZ/{G2,V2}L FCPVD bindings * Introduces new compatibles renesas,r9a07g0{44,54}-fcpvd * Added clock-names property * described clocks. --- .../bindings/media/renesas,fcp.yaml | 46 +++++++++++++++++-- 1 file changed, 41 insertions(+), 5 deletions(-)