| Message ID | 20220905073730.199462-1-alexander.stein@ew.tq-group.com |
|---|---|
| State | Accepted |
| Commit | fb4f0b69565eef4a13cf3b8534dbc0b8b5505c52 |
| Headers | show |
| Series | [v3,1/1] arm64: dts: tqma8mpql: add USB DR support | expand |
On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote: > > Hello Alexander, > > On 05.09.22 09:37, Alexander Stein wrote: > > + pinctrl_usb0: usb0grp { > > + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x1c0>, > > + <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR 0x1c0>; > > + }; > > + > > + pinctrl_usbcon0: usb0congrp { > > + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c0>; > > + }; > > I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID, > why did you decide against using the hardware function here? > Ahmad, The IMX8MP USB OTG_ID pins are internally not connected. I can't recall where this is mentioned but due to this they can not be used to select host/device mode. Best Regards, Tim
Hello Tim, On 17.10.22 21:30, Tim Harvey wrote: > On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote: >> >> Hello Alexander, >> >> On 05.09.22 09:37, Alexander Stein wrote: >>> + pinctrl_usb0: usb0grp { >>> + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x1c0>, >>> + <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR 0x1c0>; >>> + }; >>> + >>> + pinctrl_usbcon0: usb0congrp { >>> + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c0>; >>> + }; >> >> I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID, >> why did you decide against using the hardware function here? >> > > Ahmad, > > The IMX8MP USB OTG_ID pins are internally not connected. I can't > recall where this is mentioned but due to this they can not be used to > select host/device mode. Thanks for the info. Do you know if this issue exists with the i.MX8MN as well? A colleague had trouble bringing up the OTG_ID HW function and I assume it may be the same issue. I am unsure though, because the imx8mn-tqma8mqnl-mba8mx.dts muxes the pad as OTG_ID. Cheers, Ahmad > > Best Regards, > > Tim >
> -----Original Message----- > From: Ahmad Fatoum <a.fatoum@pengutronix.de> > Sent: Tuesday, October 18, 2022 3:41 AM > To: tharvey@gateworks.com > Cc: Alexander Stein <alexander.stein@ew.tq-group.com>; Shawn Guo > <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>; > devicetree@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>; Pengutronix > Kernel Team <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; > linux-arm-kernel@lists.infradead.org; Jun Li <jun.li@nxp.com> > Subject: Re: [PATCH v3 1/1] arm64: dts: tqma8mpql: add USB DR support > > Hello Tim, > > On 17.10.22 21:30, Tim Harvey wrote: > > On Fri, Oct 14, 2022 at 7:18 AM Ahmad Fatoum <a.fatoum@pengutronix.de> > wrote: > >> > >> Hello Alexander, > >> > >> On 05.09.22 09:37, Alexander Stein wrote: > >>> + pinctrl_usb0: usb0grp { > >>> + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC > 0x1c0>, > >>> + <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR > 0x1c0>; > >>> + }; > >>> + > >>> + pinctrl_usbcon0: usb0congrp { > >>> + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 > 0x1c0>; > >>> + }; > >> > >> I am wondering: You can mux for MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID, > >> why did you decide against using the hardware function here? > >> > > > > Ahmad, > > > > The IMX8MP USB OTG_ID pins are internally not connected. I can't > > recall where this is mentioned but due to this they can not be used to > > select host/device mode. > > Thanks for the info. Do you know if this issue exists with the i.MX8MN as > well? A colleague had trouble bringing up the OTG_ID HW function and I assume > it may be the same issue. I am unsure though, because the > imx8mn-tqma8mqnl-mba8mx.dts muxes the pad as OTG_ID. No, iMX8MN is completely different IP(USB2 only) than iMX8MP, iMX8MN has *OTG* inside so the ID functionality should be fine, what's the trouble you colleague had? Li Jun > > Cheers, > Ahmad > > > > > Best Regards, > > > > Tim > > > > > -- > Pengutronix e.K. | | > Steuerwalder Str. 21 | > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.pe > ngutronix.de%2F&data=05%7C01%7Cjun.li%40nxp.com%7Cac32a99803dc4e710 > 4d408dab0777a15%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6380163244 > 44837508%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLC > JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=4TFBorG%2BucyYuy > HrwhTDxjz4GV3%2FsCaHzx7i4cdw5Zw%3D&reserved=0 | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts index d8ca52976170..88579e8ac93b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts @@ -139,6 +139,13 @@ reg_vcc_3v3: regulator-3v3 { regulator-max-microvolt = <3300000>; }; + reg_vcc_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "VCC_5V0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -445,6 +452,38 @@ &uart4 { status = "okay"; }; +&usb3_0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>; + fsl,over-current-active-low; + status = "okay"; +}; + +&usb3_phy0 { + vbus-supply = <®_vcc_5v0>; + status = "okay"; +}; + +&usb_dwc3_0 { + /* dual role is implemented, but not a full featured OTG */ + hnp-disable; + srp-disable; + adp-disable; + dr_mode = "otg"; + usb-role-switch; + role-switch-default-mode = "peripheral"; + status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + type = "micro"; + label = "X29"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbcon0>; + id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + }; +}; + &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; @@ -666,6 +705,15 @@ pinctrl_uart4: uart4grp { <MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140>; }; + pinctrl_usb0: usb0grp { + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x1c0>, + <MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR 0x1c0>; + }; + + pinctrl_usbcon0: usb0congrp { + fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c0>; + }; + pinctrl_usdhc2: usdhc2grp { fsl,pins = <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x192>, <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d2>,
Add support for USB DR on USB1 interface. Host/Device detection is done using the usb-role-switch connector. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- Changes in v3: * Moved pinctrl to USB glue layer node * Ordered nodes alphabetically Changes in v2: * Split from previous series * For now enable USB OTG only .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+)