diff mbox series

[3/3] arm64: tegra: Add context isolation domains on Tegra234

Message ID 20220907083844.2486805-4-cyndis@kapsi.fi
State New
Headers show
Series [1/3] gpu: host1x: Select context device based on attached IOMMU | expand

Commit Message

Mikko Perttunen Sept. 7, 2022, 8:38 a.m. UTC 
From: Mikko Perttunen <mperttunen@nvidia.com>

Add Host1x context isolation domains on Tegra234. On Tegra234 we have
two IOMMUs that are connected to Host1x-channel programmed engines,
so we have to include domains for each of them.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 65d49b27bc5f..d764bd98433a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -570,6 +570,25 @@  host1x@13e00000 {
 			interconnect-names = "dma-mem";
 			iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
 
+			/* Context isolation domains */
+			iommu-map = <
+				0 &smmu_niso0 TEGRA234_SID_HOST1X_CTX0 1
+				1 &smmu_niso0 TEGRA234_SID_HOST1X_CTX1 1
+				2 &smmu_niso0 TEGRA234_SID_HOST1X_CTX2 1
+				3 &smmu_niso0 TEGRA234_SID_HOST1X_CTX3 1
+				4 &smmu_niso0 TEGRA234_SID_HOST1X_CTX4 1
+				5 &smmu_niso0 TEGRA234_SID_HOST1X_CTX5 1
+				6 &smmu_niso0 TEGRA234_SID_HOST1X_CTX6 1
+				7 &smmu_niso0 TEGRA234_SID_HOST1X_CTX7 1
+				8 &smmu_niso1 TEGRA234_SID_HOST1X_CTX0 1
+				9 &smmu_niso1 TEGRA234_SID_HOST1X_CTX1 1
+				10 &smmu_niso1 TEGRA234_SID_HOST1X_CTX2 1
+				11 &smmu_niso1 TEGRA234_SID_HOST1X_CTX3 1
+				12 &smmu_niso1 TEGRA234_SID_HOST1X_CTX4 1
+				13 &smmu_niso1 TEGRA234_SID_HOST1X_CTX5 1
+				14 &smmu_niso1 TEGRA234_SID_HOST1X_CTX6 1
+				15 &smmu_niso1 TEGRA234_SID_HOST1X_CTX7 1>;
+
 			vic@15340000 {
 				compatible = "nvidia,tegra234-vic";
 				reg = <0x15340000 0x00040000>;