diff mbox series

[V3,1/2] dt-bindings: usb: snps,dwc3: Add 'snps,resume-hs-terminations' quirk

Message ID 20220920052235.194272-2-piyush.mehta@amd.com
State New
Headers show
Series usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume | expand

Commit Message

Mehta, Piyush Sept. 20, 2022, 5:22 a.m. UTC 
Add a new 'snps,resume-hs-terminations' DT quirk to dwc3 core to resolved
issue of CRC failed error.

On the resume path, U3/U2 exit controller fails to send proper CRC checksum
in CRC5 field. As result Transaction Error is generated. Enabling bit 10 of
GUCTL1 will correct this problem.

When this bit is set to '1', the UTMI/ULPI opmode will be changed to
"normal" along with HS terminations and term/xcvr select signals after EOR.
This option is to support certain legacy UTMI/ULPI PHYs.

Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes in V3:
- Addressed Krzysztof Kozlowski review comments:
 - Switch to amd.com with amd SoB and ownership.
 - Added Krzysztof Ack for DT patch
Link: https://lore.kernel.org/all/6499fa0e-3e07-85b4-0800-849db7c2593b@linaro.org/

Changes in V2:
- Addressed Krzysztof Kozlowski review comments:
 - Update the quirk name and No underscores in properties.
 - Modified the quirk description. 
Link: https://lore.kernel.org/all/e15168ac-b5a1-0c15-cfb3-34fb518e737f@linaro.org/
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
 1 file changed, 7 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 1779d08ba1c0..6f9107fca6f1 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -234,6 +234,13 @@  properties:
       avoid -EPROTO errors with usbhid on some devices (Hikey 970).
     type: boolean
 
+  snps,resume-hs-terminations:
+    description:
+      Fix the issue of HS terminations CRC error on resume by enabling this
+      quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end
+      of resume. This option is to support certain legacy ULPI PHYs.
+    type: boolean
+
   snps,is-utmi-l1-suspend:
     description:
       True when DWC3 asserts output signal utmi_l1_suspend_n, false when