| Message ID | 20220921001303.56151-1-konrad.dybcio@somainline.org |
|---|---|
| State | Accepted |
| Commit | dc99bbfe48e4f3b4827dc5b04a8642c23a12917e |
| Headers | show |
| Series | [v4,1/3] clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit | expand |
On Wed, 21 Sep 2022 02:13:01 +0200, Konrad Dybcio wrote: > This is used on at least SM6375 and its variations. > > Applied, thanks! [1/3] clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit commit: dc99bbfe48e4f3b4827dc5b04a8642c23a12917e [2/3] dt-bindings: clock: add SM6375 QCOM global clock bindings commit: 43398afc0b561925a9ce57555afe3af2ddef8d35 [3/3] clk: qcom: Add global clock controller driver for SM6375 commit: 184fdd873d83bfcfdd25310ae3f2d7eb8dc5224a Best regards,
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index b42684703fbb..ea157723906a 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -27,6 +27,7 @@ # define PLL_VOTE_FSM_RESET BIT(21) # define PLL_UPDATE BIT(22) # define PLL_UPDATE_BYPASS BIT(23) +# define PLL_FSM_LEGACY_MODE BIT(24) # define PLL_OFFLINE_ACK BIT(28) # define ALPHA_PLL_ACK_LATCH BIT(29) # define PLL_ACTIVE_FLAG BIT(30) @@ -1102,6 +1103,10 @@ void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val); } + if (pll->flags & SUPPORTS_FSM_LEGACY_MODE) + regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE, + PLL_FSM_LEGACY_MODE); + regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS, PLL_UPDATE_BYPASS); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index 447efb82fe59..b15a62cb8e36 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -70,9 +70,10 @@ struct clk_alpha_pll { const struct pll_vco *vco_table; size_t num_vco; -#define SUPPORTS_OFFLINE_REQ BIT(0) -#define SUPPORTS_FSM_MODE BIT(2) +#define SUPPORTS_OFFLINE_REQ BIT(0) +#define SUPPORTS_FSM_MODE BIT(2) #define SUPPORTS_DYNAMIC_UPDATE BIT(3) +#define SUPPORTS_FSM_LEGACY_MODE BIT(4) u8 flags; struct clk_regmap clkr;
This is used on at least SM6375 and its variations. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- No changes since v3 drivers/clk/qcom/clk-alpha-pll.c | 5 +++++ drivers/clk/qcom/clk-alpha-pll.h | 5 +++-- 2 files changed, 8 insertions(+), 2 deletions(-)