Message ID | 1454318166-106971-4-git-send-email-puck.chen@hisilicon.com |
---|---|
State | Superseded |
Headers | show |
yOn Mon, 01 Feb 2016, Chen Feng wrote: > Add PMIC MFD driver to support hisilicon hi665x. > > Signed-off-by: Chen Feng <puck.chen@hisilicon.com> > Signed-off-by: Fei Wang <w.f@huawei.com> > Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> > Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > drivers/mfd/Kconfig | 10 +++ > drivers/mfd/Makefile | 1 + > drivers/mfd/hi655x-pmic.c | 162 ++++++++++++++++++++++++++++++++++++++++ > include/linux/mfd/hi655x-pmic.h | 55 ++++++++++++++ > 4 files changed, 228 insertions(+) > create mode 100644 drivers/mfd/hi655x-pmic.c > create mode 100644 include/linux/mfd/hi655x-pmic.h Acked-by: Lee Jones <lee.jones@linaro.org> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig > index 9ca66de..5b1c091 100644 > --- a/drivers/mfd/Kconfig > +++ b/drivers/mfd/Kconfig > @@ -284,6 +284,16 @@ config MFD_HI6421_PMIC > menus in order to enable them. > We communicate with the Hi6421 via memory-mapped I/O. > > +config MFD_HI655X_PMIC > + tristate "HiSilicon Hi655X series PMU/Codec IC" > + depends on ARCH_HISI || COMPILE_TEST > + depends on OF > + select MFD_CORE > + select REGMAP_MMIO > + select REGMAP_IRQ > + help > + Select this option to enable Hisilicon hi655x series pmic driver. > + > config HTC_EGPIO > bool "HTC EGPIO support" > depends on GPIOLIB && ARM > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile > index 0f230a6..1e166c1 100644 > --- a/drivers/mfd/Makefile > +++ b/drivers/mfd/Makefile > @@ -190,6 +190,7 @@ obj-$(CONFIG_MFD_STW481X) += stw481x.o > obj-$(CONFIG_MFD_IPAQ_MICRO) += ipaq-micro.o > obj-$(CONFIG_MFD_MENF21BMC) += menf21bmc.o > obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o > +obj-$(CONFIG_MFD_HI655X_PMIC) += hi655x-pmic.o > obj-$(CONFIG_MFD_DLN2) += dln2.o > obj-$(CONFIG_MFD_RT5033) += rt5033.o > obj-$(CONFIG_MFD_SKY81452) += sky81452.o > diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c > new file mode 100644 > index 0000000..05ddc78 > --- /dev/null > +++ b/drivers/mfd/hi655x-pmic.c > @@ -0,0 +1,162 @@ > +/* > + * Device driver for MFD hi655x PMIC > + * > + * Copyright (c) 2016 Hisilicon. > + * > + * Authors: > + * Chen Feng <puck.chen@hisilicon.com> > + * Fei Wang <w.f@huawei.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#include <linux/gpio.h> > +#include <linux/io.h> > +#include <linux/interrupt.h> > +#include <linux/init.h> > +#include <linux/mfd/core.h> > +#include <linux/mfd/hi655x-pmic.h> > +#include <linux/module.h> > +#include <linux/of_gpio.h> > +#include <linux/of_platform.h> > +#include <linux/platform_device.h> > +#include <linux/regmap.h> > + > +static const struct mfd_cell hi655x_pmic_devs[] = { > + { .name = "hi655x-regulator", }, > +}; > + > +static const struct regmap_irq hi655x_irqs[] = { > + { .reg_offset = 0, .mask = OTMP_D1R_INT }, > + { .reg_offset = 0, .mask = VSYS_2P5_R_INT }, > + { .reg_offset = 0, .mask = VSYS_UV_D3R_INT }, > + { .reg_offset = 0, .mask = VSYS_6P0_D200UR_INT }, > + { .reg_offset = 0, .mask = PWRON_D4SR_INT }, > + { .reg_offset = 0, .mask = PWRON_D20F_INT }, > + { .reg_offset = 0, .mask = PWRON_D20R_INT }, > + { .reg_offset = 0, .mask = RESERVE_INT }, > +}; > + > +static const struct regmap_irq_chip hi655x_irq_chip = { > + .name = "hi655x-pmic", > + .irqs = hi655x_irqs, > + .num_regs = 1, > + .num_irqs = ARRAY_SIZE(hi655x_irqs), > + .status_base = HI655X_IRQ_STAT_BASE, > + .mask_base = HI655X_IRQ_MASK_BASE, > +}; > + > +static struct regmap_config hi655x_regmap_config = { > + .reg_bits = 32, > + .reg_stride = HI655X_STRIDE, > + .val_bits = 8, > + .max_register = HI655X_BUS_ADDR(0xFFF), > +}; > + > +static void hi655x_local_irq_clear(struct regmap *map) > +{ > + int i; > + > + regmap_write(map, HI655X_ANA_IRQM_BASE, HI655X_IRQ_CLR); > + for (i = 0; i < HI655X_IRQ_ARRAY; i++) { > + regmap_write(map, HI655X_IRQ_STAT_BASE + i * HI655X_STRIDE, > + HI655X_IRQ_CLR); > + } > +} > + > +static int hi655x_pmic_probe(struct platform_device *pdev) > +{ > + int ret; > + struct hi655x_pmic *pmic; > + struct device *dev = &pdev->dev; > + struct device_node *np = dev->of_node; > + void __iomem *base; > + > + pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); > + if (!pmic) > + return -ENOMEM; > + pmic->dev = dev; > + > + pmic->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!pmic->res) > + return -ENOENT; > + > + base = devm_ioremap_resource(dev, pmic->res); > + if (!base) > + return -ENOMEM; > + > + pmic->regmap = devm_regmap_init_mmio_clk(dev, NULL, base, > + &hi655x_regmap_config); > + > + regmap_read(pmic->regmap, HI655X_BUS_ADDR(HI655X_VER_REG), &pmic->ver); > + if ((pmic->ver < PMU_VER_START) || (pmic->ver > PMU_VER_END)) { > + dev_warn(dev, "PMU version %d unsupported\n", pmic->ver); > + return -EINVAL; > + } > + > + hi655x_local_irq_clear(pmic->regmap); > + > + pmic->gpio = of_get_named_gpio(np, "pmic-gpios", 0); > + if (!gpio_is_valid(pmic->gpio)) { > + dev_err(dev, "Failed to get the pmic-gpios\n"); > + return -ENODEV; > + } > + > + ret = devm_gpio_request_one(dev, pmic->gpio, GPIOF_IN, > + "hi655x_pmic_irq"); > + if (ret < 0) { > + dev_err(dev, "Failed to request gpio %d ret = %d\n", > + pmic->gpio, ret); > + return ret; > + } > + > + ret = regmap_add_irq_chip(pmic->regmap, gpio_to_irq(pmic->gpio), > + IRQF_TRIGGER_LOW | IRQF_NO_SUSPEND, 0, > + &hi655x_irq_chip, &pmic->irq_data); > + if (ret) { > + dev_err(dev, "Failed to obtain 'hi655x_pmic_irq' %d\n", ret); > + return ret; > + } > + > + platform_set_drvdata(pdev, pmic); > + > + ret = mfd_add_devices(dev, PLATFORM_DEVID_AUTO, hi655x_pmic_devs, > + ARRAY_SIZE(hi655x_pmic_devs), NULL, 0, NULL); > + if (ret) { > + dev_err(dev, "Failed to register device %d\n", ret); > + regmap_del_irq_chip(gpio_to_irq(pmic->gpio), pmic->irq_data); > + return ret; > + } > + > + return 0; > +} > + > +static int hi655x_pmic_remove(struct platform_device *pdev) > +{ > + struct hi655x_pmic *pmic = platform_get_drvdata(pdev); > + > + regmap_del_irq_chip(gpio_to_irq(pmic->gpio), pmic->irq_data); > + mfd_remove_devices(&pdev->dev); > + return 0; > +} > + > +static const struct of_device_id hi655x_pmic_match[] = { > + { .compatible = "hisilicon,hi655x-pmic", }, > + {}, > +}; > + > +static struct platform_driver hi655x_pmic_driver = { > + .driver = { > + .name = "hi655x-pmic", > + .of_match_table = of_match_ptr(hi655x_pmic_match), > + }, > + .probe = hi655x_pmic_probe, > + .remove = hi655x_pmic_remove, > +}; > +module_platform_driver(hi655x_pmic_driver); > + > +MODULE_AUTHOR("Chen Feng <puck.chen@hisilicon.com>"); > +MODULE_DESCRIPTION("Hisilicon hi655x PMIC driver"); > +MODULE_LICENSE("GPL v2"); > diff --git a/include/linux/mfd/hi655x-pmic.h b/include/linux/mfd/hi655x-pmic.h > new file mode 100644 > index 0000000..dbbe9a6 > --- /dev/null > +++ b/include/linux/mfd/hi655x-pmic.h > @@ -0,0 +1,55 @@ > +/* > + * Device driver for regulators in hi655x IC > + * > + * Copyright (c) 2016 Hisilicon. > + * > + * Authors: > + * Chen Feng <puck.chen@hisilicon.com> > + * Fei Wang <w.f@huawei.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#ifndef __HI655X_PMIC_H > +#define __HI655X_PMIC_H > + > +/* Hi655x registers are mapped to memory bus in 4 bytes stride */ > +#define HI655X_STRIDE 4 > +#define HI655X_BUS_ADDR(x) ((x) << 2) > + > +#define HI655X_BITS 8 > + > +#define HI655X_NR_IRQ 32 > + > +#define HI655X_IRQ_STAT_BASE (0x003 << 2) > +#define HI655X_IRQ_MASK_BASE (0x007 << 2) > +#define HI655X_ANA_IRQM_BASE (0x1b5 << 2) > +#define HI655X_IRQ_ARRAY 4 > +#define HI655X_IRQ_MASK 0xFF > +#define HI655X_IRQ_CLR 0xFF > +#define HI655X_VER_REG 0x00 > + > +#define PMU_VER_START 0x10 > +#define PMU_VER_END 0x38 > + > +#define RESERVE_INT BIT(7) > +#define PWRON_D20R_INT BIT(6) > +#define PWRON_D20F_INT BIT(5) > +#define PWRON_D4SR_INT BIT(4) > +#define VSYS_6P0_D200UR_INT BIT(3) > +#define VSYS_UV_D3R_INT BIT(2) > +#define VSYS_2P5_R_INT BIT(1) > +#define OTMP_D1R_INT BIT(0) > + > +struct hi655x_pmic { > + struct resource *res; > + struct device *dev; > + struct regmap *regmap; > + int gpio; > + unsigned int ver; > + struct regmap_irq_chip_data *irq_data; > +}; > + > +#endif -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 9ca66de..5b1c091 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -284,6 +284,16 @@ config MFD_HI6421_PMIC menus in order to enable them. We communicate with the Hi6421 via memory-mapped I/O. +config MFD_HI655X_PMIC + tristate "HiSilicon Hi655X series PMU/Codec IC" + depends on ARCH_HISI || COMPILE_TEST + depends on OF + select MFD_CORE + select REGMAP_MMIO + select REGMAP_IRQ + help + Select this option to enable Hisilicon hi655x series pmic driver. + config HTC_EGPIO bool "HTC EGPIO support" depends on GPIOLIB && ARM diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 0f230a6..1e166c1 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -190,6 +190,7 @@ obj-$(CONFIG_MFD_STW481X) += stw481x.o obj-$(CONFIG_MFD_IPAQ_MICRO) += ipaq-micro.o obj-$(CONFIG_MFD_MENF21BMC) += menf21bmc.o obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o +obj-$(CONFIG_MFD_HI655X_PMIC) += hi655x-pmic.o obj-$(CONFIG_MFD_DLN2) += dln2.o obj-$(CONFIG_MFD_RT5033) += rt5033.o obj-$(CONFIG_MFD_SKY81452) += sky81452.o diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c new file mode 100644 index 0000000..05ddc78 --- /dev/null +++ b/drivers/mfd/hi655x-pmic.c @@ -0,0 +1,162 @@ +/* + * Device driver for MFD hi655x PMIC + * + * Copyright (c) 2016 Hisilicon. + * + * Authors: + * Chen Feng <puck.chen@hisilicon.com> + * Fei Wang <w.f@huawei.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/gpio.h> +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/mfd/core.h> +#include <linux/mfd/hi655x-pmic.h> +#include <linux/module.h> +#include <linux/of_gpio.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +static const struct mfd_cell hi655x_pmic_devs[] = { + { .name = "hi655x-regulator", }, +}; + +static const struct regmap_irq hi655x_irqs[] = { + { .reg_offset = 0, .mask = OTMP_D1R_INT }, + { .reg_offset = 0, .mask = VSYS_2P5_R_INT }, + { .reg_offset = 0, .mask = VSYS_UV_D3R_INT }, + { .reg_offset = 0, .mask = VSYS_6P0_D200UR_INT }, + { .reg_offset = 0, .mask = PWRON_D4SR_INT }, + { .reg_offset = 0, .mask = PWRON_D20F_INT }, + { .reg_offset = 0, .mask = PWRON_D20R_INT }, + { .reg_offset = 0, .mask = RESERVE_INT }, +}; + +static const struct regmap_irq_chip hi655x_irq_chip = { + .name = "hi655x-pmic", + .irqs = hi655x_irqs, + .num_regs = 1, + .num_irqs = ARRAY_SIZE(hi655x_irqs), + .status_base = HI655X_IRQ_STAT_BASE, + .mask_base = HI655X_IRQ_MASK_BASE, +}; + +static struct regmap_config hi655x_regmap_config = { + .reg_bits = 32, + .reg_stride = HI655X_STRIDE, + .val_bits = 8, + .max_register = HI655X_BUS_ADDR(0xFFF), +}; + +static void hi655x_local_irq_clear(struct regmap *map) +{ + int i; + + regmap_write(map, HI655X_ANA_IRQM_BASE, HI655X_IRQ_CLR); + for (i = 0; i < HI655X_IRQ_ARRAY; i++) { + regmap_write(map, HI655X_IRQ_STAT_BASE + i * HI655X_STRIDE, + HI655X_IRQ_CLR); + } +} + +static int hi655x_pmic_probe(struct platform_device *pdev) +{ + int ret; + struct hi655x_pmic *pmic; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + void __iomem *base; + + pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); + if (!pmic) + return -ENOMEM; + pmic->dev = dev; + + pmic->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!pmic->res) + return -ENOENT; + + base = devm_ioremap_resource(dev, pmic->res); + if (!base) + return -ENOMEM; + + pmic->regmap = devm_regmap_init_mmio_clk(dev, NULL, base, + &hi655x_regmap_config); + + regmap_read(pmic->regmap, HI655X_BUS_ADDR(HI655X_VER_REG), &pmic->ver); + if ((pmic->ver < PMU_VER_START) || (pmic->ver > PMU_VER_END)) { + dev_warn(dev, "PMU version %d unsupported\n", pmic->ver); + return -EINVAL; + } + + hi655x_local_irq_clear(pmic->regmap); + + pmic->gpio = of_get_named_gpio(np, "pmic-gpios", 0); + if (!gpio_is_valid(pmic->gpio)) { + dev_err(dev, "Failed to get the pmic-gpios\n"); + return -ENODEV; + } + + ret = devm_gpio_request_one(dev, pmic->gpio, GPIOF_IN, + "hi655x_pmic_irq"); + if (ret < 0) { + dev_err(dev, "Failed to request gpio %d ret = %d\n", + pmic->gpio, ret); + return ret; + } + + ret = regmap_add_irq_chip(pmic->regmap, gpio_to_irq(pmic->gpio), + IRQF_TRIGGER_LOW | IRQF_NO_SUSPEND, 0, + &hi655x_irq_chip, &pmic->irq_data); + if (ret) { + dev_err(dev, "Failed to obtain 'hi655x_pmic_irq' %d\n", ret); + return ret; + } + + platform_set_drvdata(pdev, pmic); + + ret = mfd_add_devices(dev, PLATFORM_DEVID_AUTO, hi655x_pmic_devs, + ARRAY_SIZE(hi655x_pmic_devs), NULL, 0, NULL); + if (ret) { + dev_err(dev, "Failed to register device %d\n", ret); + regmap_del_irq_chip(gpio_to_irq(pmic->gpio), pmic->irq_data); + return ret; + } + + return 0; +} + +static int hi655x_pmic_remove(struct platform_device *pdev) +{ + struct hi655x_pmic *pmic = platform_get_drvdata(pdev); + + regmap_del_irq_chip(gpio_to_irq(pmic->gpio), pmic->irq_data); + mfd_remove_devices(&pdev->dev); + return 0; +} + +static const struct of_device_id hi655x_pmic_match[] = { + { .compatible = "hisilicon,hi655x-pmic", }, + {}, +}; + +static struct platform_driver hi655x_pmic_driver = { + .driver = { + .name = "hi655x-pmic", + .of_match_table = of_match_ptr(hi655x_pmic_match), + }, + .probe = hi655x_pmic_probe, + .remove = hi655x_pmic_remove, +}; +module_platform_driver(hi655x_pmic_driver); + +MODULE_AUTHOR("Chen Feng <puck.chen@hisilicon.com>"); +MODULE_DESCRIPTION("Hisilicon hi655x PMIC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/hi655x-pmic.h b/include/linux/mfd/hi655x-pmic.h new file mode 100644 index 0000000..dbbe9a6 --- /dev/null +++ b/include/linux/mfd/hi655x-pmic.h @@ -0,0 +1,55 @@ +/* + * Device driver for regulators in hi655x IC + * + * Copyright (c) 2016 Hisilicon. + * + * Authors: + * Chen Feng <puck.chen@hisilicon.com> + * Fei Wang <w.f@huawei.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __HI655X_PMIC_H +#define __HI655X_PMIC_H + +/* Hi655x registers are mapped to memory bus in 4 bytes stride */ +#define HI655X_STRIDE 4 +#define HI655X_BUS_ADDR(x) ((x) << 2) + +#define HI655X_BITS 8 + +#define HI655X_NR_IRQ 32 + +#define HI655X_IRQ_STAT_BASE (0x003 << 2) +#define HI655X_IRQ_MASK_BASE (0x007 << 2) +#define HI655X_ANA_IRQM_BASE (0x1b5 << 2) +#define HI655X_IRQ_ARRAY 4 +#define HI655X_IRQ_MASK 0xFF +#define HI655X_IRQ_CLR 0xFF +#define HI655X_VER_REG 0x00 + +#define PMU_VER_START 0x10 +#define PMU_VER_END 0x38 + +#define RESERVE_INT BIT(7) +#define PWRON_D20R_INT BIT(6) +#define PWRON_D20F_INT BIT(5) +#define PWRON_D4SR_INT BIT(4) +#define VSYS_6P0_D200UR_INT BIT(3) +#define VSYS_UV_D3R_INT BIT(2) +#define VSYS_2P5_R_INT BIT(1) +#define OTMP_D1R_INT BIT(0) + +struct hi655x_pmic { + struct resource *res; + struct device *dev; + struct regmap *regmap; + int gpio; + unsigned int ver; + struct regmap_irq_chip_data *irq_data; +}; + +#endif