| Message ID | 20220928152822.30687-8-johan+linaro@kernel.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | None | expand |
On Wed, Sep 28, 2022 at 10:15:46PM +0300, Dmitry Baryshkov wrote: > On 28/09/2022 18:28, Johan Hovold wrote: > > Always define the POWER_DOWN_CONTROL register instead of falling back to > > the v2 offset during power on and power off. > > > > Signed-off-by: Johan Hovold <johan+linaro@kernel.org> > > --- > > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 20 ++++++-------------- > > 1 file changed, 6 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > > index eea66c24cf7e..47cdb9ed80cd 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > > @@ -90,12 +90,14 @@ static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { > > [QPHY_SW_RESET] = 0x00, > > [QPHY_START_CTRL] = 0x08, > > [QPHY_PCS_STATUS] = 0x174, > > + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, > > }; > > Without symbolic names it's not obvious that 0x04 (and thus this > regs_layout) can be used for v2 and v3, but not for v4. It's no less obvious than it was when we were falling back to the v2 define when it wasn't in the table. > @@ -1872,13 +1874,8 @@ static int qmp_pcie_init(struct phy *phy) > if (ret) > goto err_assert_reset; > - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) > - qphy_setbits(pcs, > - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], > - cfg->pwrdn_ctrl); > - else > - qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, > - cfg->pwrdn_ctrl); > + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], > + cfg->pwrdn_ctrl); This is the cruft I'm getting rid of. Johan
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index eea66c24cf7e..47cdb9ed80cd 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -90,12 +90,14 @@ static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_SW_RESET] = 0x00, [QPHY_START_CTRL] = 0x08, [QPHY_PCS_STATUS] = 0x174, + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, }; static const unsigned int sdm845_qhp_pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_SW_RESET] = 0x00, [QPHY_START_CTRL] = 0x08, [QPHY_PCS_STATUS] = 0x2ac, + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, }; static const unsigned int sm8250_pcie_regs_layout[QPHY_LAYOUT_SIZE] = { @@ -1872,13 +1874,8 @@ static int qmp_pcie_init(struct phy *phy) if (ret) goto err_assert_reset; - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) - qphy_setbits(pcs, - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - cfg->pwrdn_ctrl); - else - qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, - cfg->pwrdn_ctrl); + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); return 0; @@ -1995,13 +1992,8 @@ static int qmp_pcie_power_off(struct phy *phy) qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); /* Put PHY into POWER DOWN state: active low */ - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) { - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - cfg->pwrdn_ctrl); - } else { - qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, - cfg->pwrdn_ctrl); - } + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); return 0; }
Always define the POWER_DOWN_CONTROL register instead of falling back to the v2 offset during power on and power off. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-)