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[1/3] dt-bindings: gpio: Conver Unisoc GPIO controller binding to yaml

Message ID 20220928092937.27120-1-zhang.lyra@gmail.com
State Superseded
Headers show
Series [1/3] dt-bindings: gpio: Conver Unisoc GPIO controller binding to yaml | expand

Commit Message

Chunyan Zhang Sept. 28, 2022, 9:29 a.m. UTC
From: Chunyan Zhang <chunyan.zhang@unisoc.com>

Convert the Unisoc gpio controller binding to DT schema format.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
---
 .../devicetree/bindings/gpio/gpio-sprd.txt    | 28 --------
 .../devicetree/bindings/gpio/sprd,gpio.yaml   | 70 +++++++++++++++++++
 2 files changed, 70 insertions(+), 28 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-sprd.txt
 create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio.yaml

Comments

Krzysztof Kozlowski Sept. 28, 2022, 11:34 a.m. UTC | #1
On 28/09/2022 11:29, Chunyan Zhang wrote:
> From: Chunyan Zhang <chunyan.zhang@unisoc.com>
> 
> Convert the Unisoc EIC controller binding to DT schema format.
> 
> Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
> ---
>  .../bindings/gpio/gpio-eic-sprd.txt           |  97 ------------
>  .../bindings/gpio/sprd,gpio-eic.yaml          | 145 ++++++++++++++++++
>  2 files changed, 145 insertions(+), 97 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt
>  create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml
> 
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt
> deleted file mode 100644
> index 54040a2bfe3a..000000000000
> --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt
> +++ /dev/null
> @@ -1,97 +0,0 @@
> -Spreadtrum EIC controller bindings
> -
> -The EIC is the abbreviation of external interrupt controller, which can
> -be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
> -one is in digital chip, and another one is in PMIC. The digital chip EIC
> -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
> -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
> -module.
> -
> -The EIC-debounce sub-module provides up to 8 source input signal
> -connections. A debounce mechanism is used to capture the input signals'
> -stable status (millisecond resolution) and a single-trigger mechanism
> -is introduced into this sub-module to enhance the input event detection
> -reliability. In addition, this sub-module's clock can be shut off
> -automatically to reduce power dissipation. Moreover the debounce range
> -is from 1ms to 4s with a step size of 1ms. The input signal will be
> -ignored if it is asserted for less than 1 ms.
> -
> -The EIC-latch sub-module is used to latch some special power down signals
> -and generate interrupts, since the EIC-latch does not depend on the APB
> -clock to capture signals.
> -
> -The EIC-async sub-module uses a 32kHz clock to capture the short signals
> -(microsecond resolution) to generate interrupts by level or edge trigger.
> -
> -The EIC-sync is similar with GPIO's input function, which is a synchronized
> -signal input register. It can generate interrupts by level or edge trigger
> -when detecting input signals.
> -
> -Required properties:
> -- compatible: Should be one of the following:
> -  "sprd,sc9860-eic-debounce",
> -  "sprd,sc9860-eic-latch",
> -  "sprd,sc9860-eic-async",
> -  "sprd,sc9860-eic-sync",
> -  "sprd,sc2731-eic".
> -- reg: Define the base and range of the I/O address space containing
> -  the GPIO controller registers.
> -- gpio-controller: Marks the device node as a GPIO controller.
> -- #gpio-cells: Should be <2>. The first cell is the gpio number and
> -  the second cell is used to specify optional parameters.
> -- interrupt-controller: Marks the device node as an interrupt controller.
> -- #interrupt-cells: Should be <2>. Specifies the number of cells needed
> -  to encode interrupt source.
> -- interrupts: Should be the port interrupt shared by all the gpios.
> -
> -Example:
> -	eic_debounce: gpio@40210000 {
> -		compatible = "sprd,sc9860-eic-debounce";
> -		reg = <0 0x40210000 0 0x80>;
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -		interrupt-controller;
> -		#interrupt-cells = <2>;
> -		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
> -	eic_latch: gpio@40210080 {
> -		compatible = "sprd,sc9860-eic-latch";
> -		reg = <0 0x40210080 0 0x20>;
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -		interrupt-controller;
> -		#interrupt-cells = <2>;
> -		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
> -	eic_async: gpio@402100a0 {
> -		compatible = "sprd,sc9860-eic-async";
> -		reg = <0 0x402100a0 0 0x20>;
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -		interrupt-controller;
> -		#interrupt-cells = <2>;
> -		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
> -	eic_sync: gpio@402100c0 {
> -		compatible = "sprd,sc9860-eic-sync";
> -		reg = <0 0x402100c0 0 0x20>;
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -		interrupt-controller;
> -		#interrupt-cells = <2>;
> -		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> -	};
> -
> -	pmic_eic: gpio@300 {
> -		compatible = "sprd,sc2731-eic";
> -		reg = <0x300>;
> -		interrupt-parent = <&sc2731_pmic>;
> -		interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -		interrupt-controller;
> -		#interrupt-cells = <2>;
> -	};
> diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml
> new file mode 100644
> index 000000000000..e25ee1884c07
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml
> @@ -0,0 +1,145 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright 2022 Unisoc Inc.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Unisoc EIC controller
> +
> +maintainers:
> +  - Orson Zhai <orsonzhai@gmail.com>
> +  - Baolin Wang <baolin.wang7@gmail.com>
> +  - Chunyan Zhang <zhang.lyra@gmail.com>
> +
> +description:
> +  The EIC is the abbreviation of external interrupt controller, which can
> +  be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
> +  one is in digital chip, and another one is in PMIC. The digital chip EIC
> +  controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
> +  EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
> +  module.
> +
> +  The EIC-debounce sub-module provides up to 8 source input signal
> +  connections. A debounce mechanism is used to capture the input signals'
> +  stable status (millisecond resolution) and a single-trigger mechanism
> +  is introduced into this sub-module to enhance the input event detection
> +  reliability. In addition, this sub-module's clock can be shut off
> +  automatically to reduce power dissipation. Moreover the debounce range
> +  is from 1ms to 4s with a step size of 1ms. The input signal will be
> +  ignored if it is asserted for less than 1 ms.
> +
> +  The EIC-latch sub-module is used to latch some special power down signals
> +  and generate interrupts, since the EIC-latch does not depend on the APB
> +  clock to capture signals.
> +
> +  The EIC-async sub-module uses a 32kHz clock to capture the short signals
> +  (microsecond resolution) to generate interrupts by level or edge trigger.
> +
> +  The EIC-sync is similar with GPIO's input function, which is a synchronized
> +  signal input register. It can generate interrupts by level or edge trigger
> +  when detecting input signals.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - sprd,sc9860-eic-debounce
> +      - sprd,sc9860-eic-latch
> +      - sprd,sc9860-eic-async
> +      - sprd,sc9860-eic-sync
> +      - sprd,sc2731-eic
> +
> +  reg:
> +    minItems: 1
> +    maxItems: 4

Why up to 4 items? Previous bindings did not mention it. I also do not
see any users of this. Anyway you need to describe the items (items with
description) and restrict per variant in allOf:if:then


> +
> +  gpio-controller: true
> +
> +  "#gpio-cells":
> +    const: 2
> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 2
> +
> +  interrupts:
> +    maxItems: 1
> +    description: The interrupt shared by all GPIO lines for this controller.
> +
> +required:
> +  - compatible
> +  - reg
> +  - gpio-controller
> +  - "#gpio-cells"
> +  - interrupt-controller
> +  - "#interrupt-cells"
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        eic_debounce: gpio@40210000 {
> +            compatible = "sprd,sc9860-eic-debounce";
> +            reg = <0 0x40210000 0 0x80>;
> +            gpio-controller;
> +            #gpio-cells = <2>;
> +            interrupt-controller;
> +            #interrupt-cells = <2>;
> +            interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;

One example is enough. All others are the same.


Best regards,
Krzysztof
Chunyan Zhang Sept. 29, 2022, 2:29 a.m. UTC | #2
Hi Krzysztof,

On Wed, 28 Sept 2022 at 19:31, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 28/09/2022 11:29, Chunyan Zhang wrote:
> > From: Chunyan Zhang <chunyan.zhang@unisoc.com>
> >
> > Convert the Unisoc gpio controller binding to DT schema format.
> >
>
>
> Thank you for your patch. There is something to discuss/improve.
>
> > diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
> > new file mode 100644
> > index 000000000000..c0cd1ed9809b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
> > @@ -0,0 +1,70 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright 2022 Unisoc Inc.
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml#
>
> Use compatible as filename, so sprd,sc9860-gpio.yaml

Humm... This is not only for SC9860, also for other IPs, UMS512 as an
example which added in this patchset.

Thanks for the review,
Chunyan

>
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Unisoc GPIO controller
> > +
>
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski Sept. 29, 2022, 7:02 a.m. UTC | #3
On 29/09/2022 04:29, Chunyan Zhang wrote:
> Hi Krzysztof,
> 
> On Wed, 28 Sept 2022 at 19:31, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 28/09/2022 11:29, Chunyan Zhang wrote:
>>> From: Chunyan Zhang <chunyan.zhang@unisoc.com>
>>>
>>> Convert the Unisoc gpio controller binding to DT schema format.
>>>
>>
>>
>> Thank you for your patch. There is something to discuss/improve.
>>
>>> diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
>>> new file mode 100644
>>> index 000000000000..c0cd1ed9809b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
>>> @@ -0,0 +1,70 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +# Copyright 2022 Unisoc Inc.
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml#
>>
>> Use compatible as filename, so sprd,sc9860-gpio.yaml
> 
> Humm... This is not only for SC9860, also for other IPs, UMS512 as an
> example which added in this patchset.
> 


Then it's ok. It seems you have also typo in commit subject (Conver).

Best regards,
Krzysztof
Chunyan Zhang Sept. 29, 2022, 7:43 a.m. UTC | #4
On Thu, 29 Sept 2022 at 15:02, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 29/09/2022 04:29, Chunyan Zhang wrote:
> > Hi Krzysztof,
> >
> > On Wed, 28 Sept 2022 at 19:31, Krzysztof Kozlowski
> > <krzysztof.kozlowski@linaro.org> wrote:
> >>
> >> On 28/09/2022 11:29, Chunyan Zhang wrote:
> >>> From: Chunyan Zhang <chunyan.zhang@unisoc.com>
> >>>
> >>> Convert the Unisoc gpio controller binding to DT schema format.
> >>>
> >>
> >>
> >> Thank you for your patch. There is something to discuss/improve.
> >>
> >>> diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
> >>> new file mode 100644
> >>> index 000000000000..c0cd1ed9809b
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
> >>> @@ -0,0 +1,70 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>> +# Copyright 2022 Unisoc Inc.
> >>> +%YAML 1.2
> >>> +---
> >>> +$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml#
> >>
> >> Use compatible as filename, so sprd,sc9860-gpio.yaml
> >
> > Humm... This is not only for SC9860, also for other IPs, UMS512 as an
> > example which added in this patchset.
> >
>
>
> Then it's ok. It seems you have also typo in commit subject (Conver).

Ah yes -_-||, will fix that.

>
> Best regards,
> Krzysztof
>
Chunyan Zhang Sept. 29, 2022, 8:36 a.m. UTC | #5
On Wed, 28 Sept 2022 at 19:34, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 28/09/2022 11:29, Chunyan Zhang wrote:
> > From: Chunyan Zhang <chunyan.zhang@unisoc.com>
> >
> > Convert the Unisoc EIC controller binding to DT schema format.
> >
> > Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
> > ---
> >  .../bindings/gpio/gpio-eic-sprd.txt           |  97 ------------
> >  .../bindings/gpio/sprd,gpio-eic.yaml          | 145 ++++++++++++++++++
> >  2 files changed, 145 insertions(+), 97 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt
> >  create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt
> > deleted file mode 100644
> > index 54040a2bfe3a..000000000000
> > --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt
> > +++ /dev/null
> > @@ -1,97 +0,0 @@
> > -Spreadtrum EIC controller bindings
> > -
> > -The EIC is the abbreviation of external interrupt controller, which can
> > -be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
> > -one is in digital chip, and another one is in PMIC. The digital chip EIC
> > -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
> > -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
> > -module.
> > -
> > -The EIC-debounce sub-module provides up to 8 source input signal
> > -connections. A debounce mechanism is used to capture the input signals'
> > -stable status (millisecond resolution) and a single-trigger mechanism
> > -is introduced into this sub-module to enhance the input event detection
> > -reliability. In addition, this sub-module's clock can be shut off
> > -automatically to reduce power dissipation. Moreover the debounce range
> > -is from 1ms to 4s with a step size of 1ms. The input signal will be
> > -ignored if it is asserted for less than 1 ms.
> > -
> > -The EIC-latch sub-module is used to latch some special power down signals
> > -and generate interrupts, since the EIC-latch does not depend on the APB
> > -clock to capture signals.
> > -
> > -The EIC-async sub-module uses a 32kHz clock to capture the short signals
> > -(microsecond resolution) to generate interrupts by level or edge trigger.
> > -
> > -The EIC-sync is similar with GPIO's input function, which is a synchronized
> > -signal input register. It can generate interrupts by level or edge trigger
> > -when detecting input signals.
> > -
> > -Required properties:
> > -- compatible: Should be one of the following:
> > -  "sprd,sc9860-eic-debounce",
> > -  "sprd,sc9860-eic-latch",
> > -  "sprd,sc9860-eic-async",
> > -  "sprd,sc9860-eic-sync",
> > -  "sprd,sc2731-eic".
> > -- reg: Define the base and range of the I/O address space containing
> > -  the GPIO controller registers.
> > -- gpio-controller: Marks the device node as a GPIO controller.
> > -- #gpio-cells: Should be <2>. The first cell is the gpio number and
> > -  the second cell is used to specify optional parameters.
> > -- interrupt-controller: Marks the device node as an interrupt controller.
> > -- #interrupt-cells: Should be <2>. Specifies the number of cells needed
> > -  to encode interrupt source.
> > -- interrupts: Should be the port interrupt shared by all the gpios.
> > -
> > -Example:
> > -     eic_debounce: gpio@40210000 {
> > -             compatible = "sprd,sc9860-eic-debounce";
> > -             reg = <0 0x40210000 0 0x80>;
> > -             gpio-controller;
> > -             #gpio-cells = <2>;
> > -             interrupt-controller;
> > -             #interrupt-cells = <2>;
> > -             interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> > -     };
> > -
> > -     eic_latch: gpio@40210080 {
> > -             compatible = "sprd,sc9860-eic-latch";
> > -             reg = <0 0x40210080 0 0x20>;
> > -             gpio-controller;
> > -             #gpio-cells = <2>;
> > -             interrupt-controller;
> > -             #interrupt-cells = <2>;
> > -             interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> > -     };
> > -
> > -     eic_async: gpio@402100a0 {
> > -             compatible = "sprd,sc9860-eic-async";
> > -             reg = <0 0x402100a0 0 0x20>;
> > -             gpio-controller;
> > -             #gpio-cells = <2>;
> > -             interrupt-controller;
> > -             #interrupt-cells = <2>;
> > -             interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> > -     };
> > -
> > -     eic_sync: gpio@402100c0 {
> > -             compatible = "sprd,sc9860-eic-sync";
> > -             reg = <0 0x402100c0 0 0x20>;
> > -             gpio-controller;
> > -             #gpio-cells = <2>;
> > -             interrupt-controller;
> > -             #interrupt-cells = <2>;
> > -             interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> > -     };
> > -
> > -     pmic_eic: gpio@300 {
> > -             compatible = "sprd,sc2731-eic";
> > -             reg = <0x300>;
> > -             interrupt-parent = <&sc2731_pmic>;
> > -             interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
> > -             gpio-controller;
> > -             #gpio-cells = <2>;
> > -             interrupt-controller;
> > -             #interrupt-cells = <2>;
> > -     };
> > diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml
> > new file mode 100644
> > index 000000000000..e25ee1884c07
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml
> > @@ -0,0 +1,145 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright 2022 Unisoc Inc.
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Unisoc EIC controller
> > +
> > +maintainers:
> > +  - Orson Zhai <orsonzhai@gmail.com>
> > +  - Baolin Wang <baolin.wang7@gmail.com>
> > +  - Chunyan Zhang <zhang.lyra@gmail.com>
> > +
> > +description:
> > +  The EIC is the abbreviation of external interrupt controller, which can
> > +  be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
> > +  one is in digital chip, and another one is in PMIC. The digital chip EIC
> > +  controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
> > +  EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
> > +  module.
> > +
> > +  The EIC-debounce sub-module provides up to 8 source input signal
> > +  connections. A debounce mechanism is used to capture the input signals'
> > +  stable status (millisecond resolution) and a single-trigger mechanism
> > +  is introduced into this sub-module to enhance the input event detection
> > +  reliability. In addition, this sub-module's clock can be shut off
> > +  automatically to reduce power dissipation. Moreover the debounce range
> > +  is from 1ms to 4s with a step size of 1ms. The input signal will be
> > +  ignored if it is asserted for less than 1 ms.
> > +
> > +  The EIC-latch sub-module is used to latch some special power down signals
> > +  and generate interrupts, since the EIC-latch does not depend on the APB
> > +  clock to capture signals.
> > +
> > +  The EIC-async sub-module uses a 32kHz clock to capture the short signals
> > +  (microsecond resolution) to generate interrupts by level or edge trigger.
> > +
> > +  The EIC-sync is similar with GPIO's input function, which is a synchronized
> > +  signal input register. It can generate interrupts by level or edge trigger
> > +  when detecting input signals.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - sprd,sc9860-eic-debounce
> > +      - sprd,sc9860-eic-latch
> > +      - sprd,sc9860-eic-async
> > +      - sprd,sc9860-eic-sync
> > +      - sprd,sc2731-eic
> > +
> > +  reg:
> > +    minItems: 1
> > +    maxItems: 4
>
> Why up to 4 items? Previous bindings did not mention it. I also do not

For the mainstream gpio-eic-sprd driver [1], it supports 3 reg items,
I will fix this.

> see any users of this. Anyway you need to describe the items (items with
> description) and restrict per variant in allOf:if:then

Ok.

>
> > +
> > +  gpio-controller: true
> > +
> > +  "#gpio-cells":
> > +    const: 2
> > +
> > +  interrupt-controller: true
> > +
> > +  "#interrupt-cells":
> > +    const: 2
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +    description: The interrupt shared by all GPIO lines for this controller.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - gpio-controller
> > +  - "#gpio-cells"
> > +  - interrupt-controller
> > +  - "#interrupt-cells"
> > +  - interrupts
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +    soc {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +
> > +        eic_debounce: gpio@40210000 {
> > +            compatible = "sprd,sc9860-eic-debounce";
> > +            reg = <0 0x40210000 0 0x80>;
> > +            gpio-controller;
> > +            #gpio-cells = <2>;
> > +            interrupt-controller;
> > +            #interrupt-cells = <2>;
> > +            interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
>
> One example is enough. All others are the same.

Ok, will remove.

Thanks for the review,
Chunyan

[1] https://kernel.googlesource.com/pub/scm/linux/kernel/git/torvalds/linux/+/refs/tags/v6.0-rc7/drivers/gpio/gpio-eic-sprd.c#592
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-sprd.txt
deleted file mode 100644
index eca97d45388f..000000000000
--- a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt
+++ /dev/null
@@ -1,28 +0,0 @@ 
-Spreadtrum GPIO controller bindings
-
-The controller's registers are organized as sets of sixteen 16-bit
-registers with each set controlling a bank of up to 16 pins. A single
-interrupt is shared for all of the banks handled by the controller.
-
-Required properties:
-- compatible: Should be "sprd,sc9860-gpio".
-- reg: Define the base and range of the I/O address space containing
-the GPIO controller registers.
-- gpio-controller: Marks the device node as a GPIO controller.
-- #gpio-cells: Should be <2>. The first cell is the gpio number and
-the second cell is used to specify optional parameters.
-- interrupt-controller: Marks the device node as an interrupt controller.
-- #interrupt-cells: Should be <2>. Specifies the number of cells needed
-to encode interrupt source.
-- interrupts: Should be the port interrupt shared by all the gpios.
-
-Example:
-	ap_gpio: gpio@40280000 {
-		compatible = "sprd,sc9860-gpio";
-		reg = <0 0x40280000 0 0x1000>;
-		gpio-controller;
-		#gpio-cells = <2>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
-		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-	};
diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
new file mode 100644
index 000000000000..c0cd1ed9809b
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml
@@ -0,0 +1,70 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2022 Unisoc Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Unisoc GPIO controller
+
+maintainers:
+  - Orson Zhai <orsonzhai@gmail.com>
+  - Baolin Wang <baolin.wang7@gmail.com>
+  - Chunyan Zhang <zhang.lyra@gmail.com>
+
+description:
+  The controller's registers are organized as sets of sixteen 16-bit
+  registers with each set controlling a bank of up to 16 pins. A single
+  interrupt is shared for all of the banks handled by the controller.
+
+properties:
+  compatible:
+    const: sprd,sc9860-gpio
+
+  reg:
+    maxItems: 1
+
+  gpio-controller: true
+
+  "#gpio-cells":
+    const: 2
+
+  interrupt-controller: true
+
+  "#interrupt-cells":
+    const: 2
+
+  interrupts:
+    maxItems: 1
+    description: The interrupt shared by all GPIO lines for this controller.
+
+required:
+  - compatible
+  - reg
+  - gpio-controller
+  - "#gpio-cells"
+  - interrupt-controller
+  - "#interrupt-cells"
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        ap_gpio: gpio@40280000 {
+            compatible = "sprd,sc9860-gpio";
+            reg = <0 0x40280000 0 0x1000>;
+            gpio-controller;
+            #gpio-cells = <2>;
+            interrupt-controller;
+            #interrupt-cells = <2>;
+            interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+        };
+    };
+...