| Message ID | 20220929002834.32664-1-bwicaksono@nvidia.com |
|---|---|
| State | Accepted |
| Commit | 6251d38059ae22304ede4f3748af9f795bdbf4fd |
| Headers | show |
| Series | [v2] ACPI: ARM Performance Monitoring Unit Table (APMT) initial support | expand |
On Thu, Sep 29, 2022 at 2:29 AM Besar Wicaksono <bwicaksono@nvidia.com> wrote: > > ARM Performance Monitoring Unit Table describes the properties of PMU > support in ARM-based system. The APMT table contains a list of nodes, > each represents a PMU in the system that conforms to ARM CoreSight PMU > architecture. The properties of each node include information required > to access the PMU (e.g. MMIO base address, interrupt number) and also > identification. For more detailed information, please refer to the > specification below: > * APMT: https://developer.arm.com/documentation/den0117/latest > * ARM Coresight PMU: > https://developer.arm.com/documentation/ihi0091/latest > > The initial support adds the detection of APMT table and generic > infrastructure to create platform devices for ARM CoreSight PMUs. > Similar to IORT the root pointer of APMT is preserved during runtime > and each PMU platform device is given a pointer to the corresponding > APMT node. > > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> for the change in bus.c, but as a side note, it would be good to move all of the ARM-specific initialization into one place, so it is not necessary to touch bus.c every time a new piece of it is added. > --- > > The patch applies on top of > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > master next-20220524 > > Changes from v1: > * Include acpi_apmt.h header file > * Update the device name. Related driver patch: > https://lore.kernel.org/linux-arm-kernel/20220928201830.45637-1-bwicaksono@nvidia.com/ > v1: https://lkml.org/lkml/2022/4/19/1395 > > arch/arm64/Kconfig | 1 + > drivers/acpi/arm64/Kconfig | 3 + > drivers/acpi/arm64/Makefile | 1 + > drivers/acpi/arm64/apmt.c | 177 ++++++++++++++++++++++++++++++++++++ > drivers/acpi/bus.c | 2 + > include/linux/acpi_apmt.h | 19 ++++ > 6 files changed, 203 insertions(+) > create mode 100644 drivers/acpi/arm64/apmt.c > create mode 100644 include/linux/acpi_apmt.h > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index aaeb70358979..dbcb09ee29dd 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -1,6 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0-only > config ARM64 > def_bool y > + select ACPI_APMT if ACPI > select ACPI_CCA_REQUIRED if ACPI > select ACPI_GENERIC_GSI if ACPI > select ACPI_GTDT if ACPI > diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig > index d4a72835f328..b3ed6212244c 100644 > --- a/drivers/acpi/arm64/Kconfig > +++ b/drivers/acpi/arm64/Kconfig > @@ -18,3 +18,6 @@ config ACPI_AGDI > reset command. > > If set, the kernel parses AGDI table and listens for the command. > + > +config ACPI_APMT > + bool > diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile > index 7b9e4045659d..e21a9e84e394 100644 > --- a/drivers/acpi/arm64/Makefile > +++ b/drivers/acpi/arm64/Makefile > @@ -2,4 +2,5 @@ > obj-$(CONFIG_ACPI_AGDI) += agdi.o > obj-$(CONFIG_ACPI_IORT) += iort.o > obj-$(CONFIG_ACPI_GTDT) += gtdt.o > +obj-$(CONFIG_ACPI_APMT) += apmt.o > obj-y += dma.o > diff --git a/drivers/acpi/arm64/apmt.c b/drivers/acpi/arm64/apmt.c > new file mode 100644 > index 000000000000..f55167ca51e7 > --- /dev/null > +++ b/drivers/acpi/arm64/apmt.c > @@ -0,0 +1,177 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * ARM APMT table support. > + * Design document number: ARM DEN0117. > + * > + * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. > + * > + */ > + > +#define pr_fmt(fmt) "ACPI: APMT: " fmt > + > +#include <linux/acpi.h> > +#include <linux/acpi_apmt.h> > +#include <linux/init.h> > +#include <linux/kernel.h> > +#include <linux/platform_device.h> > + > +#define DEV_NAME "arm-cs-arch-pmu" > + > +/* There can be up to 3 resources: page 0 and 1 address, and interrupt. */ > +#define DEV_MAX_RESOURCE_COUNT 3 > + > +/* Root pointer to the mapped APMT table */ > +static struct acpi_table_header *apmt_table; > + > +static int __init apmt_init_resources(struct resource *res, > + struct acpi_apmt_node *node) > +{ > + int irq, trigger; > + int num_res = 0; > + > + res[num_res].start = node->base_address0; > + res[num_res].end = node->base_address0 + SZ_4K - 1; > + res[num_res].flags = IORESOURCE_MEM; > + > + num_res++; > + > + res[num_res].start = node->base_address1; > + res[num_res].end = node->base_address1 + SZ_4K - 1; > + res[num_res].flags = IORESOURCE_MEM; > + > + num_res++; > + > + if (node->ovflw_irq != 0) { > + trigger = (node->ovflw_irq_flags & ACPI_APMT_OVFLW_IRQ_FLAGS_MODE); > + trigger = (trigger == ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL) ? > + ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; > + irq = acpi_register_gsi(NULL, node->ovflw_irq, trigger, > + ACPI_ACTIVE_HIGH); > + > + if (irq <= 0) { > + pr_warn("APMT could not register gsi hwirq %d\n", irq); > + return num_res; > + } > + > + res[num_res].start = irq; > + res[num_res].end = irq; > + res[num_res].flags = IORESOURCE_IRQ; > + > + num_res++; > + } > + > + return num_res; > +} > + > +/** > + * apmt_add_platform_device() - Allocate a platform device for APMT node > + * @node: Pointer to device ACPI APMT node > + * > + * Returns: 0 on success, <0 failure > + */ > +static int __init apmt_add_platform_device(struct acpi_apmt_node *node, > + struct fwnode_handle *fwnode) > +{ > + struct platform_device *pdev; > + int ret, count; > + struct resource res[DEV_MAX_RESOURCE_COUNT]; > + > + pdev = platform_device_alloc(DEV_NAME, PLATFORM_DEVID_AUTO); > + if (!pdev) > + return -ENOMEM; > + > + memset(res, 0, sizeof(res)); > + > + count = apmt_init_resources(res, node); > + > + ret = platform_device_add_resources(pdev, res, count); > + if (ret) > + goto dev_put; > + > + /* > + * Add a copy of APMT node pointer to platform_data to be used to > + * retrieve APMT data information. > + */ > + ret = platform_device_add_data(pdev, &node, sizeof(node)); > + if (ret) > + goto dev_put; > + > + pdev->dev.fwnode = fwnode; > + > + ret = platform_device_add(pdev); > + > + if (ret) > + goto dev_put; > + > + return 0; > + > +dev_put: > + platform_device_put(pdev); > + > + return ret; > +} > + > +static int __init apmt_init_platform_devices(void) > +{ > + struct acpi_apmt_node *apmt_node; > + struct acpi_table_apmt *apmt; > + struct fwnode_handle *fwnode; > + u64 offset, end; > + int ret; > + > + /* > + * apmt_table and apmt both point to the start of APMT table, but > + * have different struct types > + */ > + apmt = (struct acpi_table_apmt *)apmt_table; > + offset = sizeof(*apmt); > + end = apmt->header.length; > + > + while (offset < end) { > + apmt_node = ACPI_ADD_PTR(struct acpi_apmt_node, apmt, > + offset); > + > + fwnode = acpi_alloc_fwnode_static(); > + if (!fwnode) > + return -ENOMEM; > + > + ret = apmt_add_platform_device(apmt_node, fwnode); > + if (ret) { > + acpi_free_fwnode_static(fwnode); > + return ret; > + } > + > + offset += apmt_node->length; > + } > + > + return 0; > +} > + > +void __init acpi_apmt_init(void) > +{ > + acpi_status status; > + int ret; > + > + /** > + * APMT table nodes will be used at runtime after the apmt init, > + * so we don't need to call acpi_put_table() to release > + * the APMT table mapping. > + */ > + status = acpi_get_table(ACPI_SIG_APMT, 0, &apmt_table); > + > + if (ACPI_FAILURE(status)) { > + if (status != AE_NOT_FOUND) { > + const char *msg = acpi_format_exception(status); > + > + pr_err("Failed to get APMT table, %s\n", msg); > + } > + > + return; > + } > + > + ret = apmt_init_platform_devices(); > + if (ret) { > + pr_err("Failed to initialize APMT platform devices, ret: %d\n", ret); > + acpi_put_table(apmt_table); > + } > +} > diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c > index 86fa61a21826..f9dc5b3d5c55 100644 > --- a/drivers/acpi/bus.c > +++ b/drivers/acpi/bus.c > @@ -27,6 +27,7 @@ > #include <linux/dmi.h> > #endif > #include <linux/acpi_agdi.h> > +#include <linux/acpi_apmt.h> > #include <linux/acpi_iort.h> > #include <linux/acpi_viot.h> > #include <linux/pci.h> > @@ -1411,6 +1412,7 @@ static int __init acpi_init(void) > acpi_setup_sb_notify_handler(); > acpi_viot_init(); > acpi_agdi_init(); > + acpi_apmt_init(); > return 0; > } > > diff --git a/include/linux/acpi_apmt.h b/include/linux/acpi_apmt.h > new file mode 100644 > index 000000000000..40bd634d082f > --- /dev/null > +++ b/include/linux/acpi_apmt.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0 > + * > + * ARM CoreSight PMU driver. > + * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. > + * > + */ > + > +#ifndef __ACPI_APMT_H__ > +#define __ACPI_APMT_H__ > + > +#include <linux/acpi.h> > + > +#ifdef CONFIG_ACPI_APMT > +void acpi_apmt_init(void); > +#else > +static inline void acpi_apmt_init(void) { } > +#endif /* CONFIG_ACPI_APMT */ > + > +#endif /* __ACPI_APMT_H__ */ > > base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a > -- > 2.17.1 >
... > > The initial support adds the detection of APMT table and generic > > infrastructure to create platform devices for ARM CoreSight PMUs. > > Similar to IORT the root pointer of APMT is preserved during runtime > > and each PMU platform device is given a pointer to the corresponding > > APMT node. > > > > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> > > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Thanks Rafael! > > for the change in bus.c, but as a side note, it would be good to move > all of the ARM-specific initialization into one place, so it is not > necessary to touch bus.c every time a new piece of it is added. > Sudeep, do you have further comments ? Thanks, Besar
On Fri, Sep 30, 2022 at 07:46:08PM +0200, Rafael J. Wysocki wrote: > On Thu, Sep 29, 2022 at 2:29 AM Besar Wicaksono <bwicaksono@nvidia.com> wrote: > > > > ARM Performance Monitoring Unit Table describes the properties of PMU > > support in ARM-based system. The APMT table contains a list of nodes, > > each represents a PMU in the system that conforms to ARM CoreSight PMU > > architecture. The properties of each node include information required > > to access the PMU (e.g. MMIO base address, interrupt number) and also > > identification. For more detailed information, please refer to the > > specification below: > > * APMT: https://developer.arm.com/documentation/den0117/latest > > * ARM Coresight PMU: > > https://developer.arm.com/documentation/ihi0091/latest > > > > The initial support adds the detection of APMT table and generic > > infrastructure to create platform devices for ARM CoreSight PMUs. > > Similar to IORT the root pointer of APMT is preserved during runtime > > and each PMU platform device is given a pointer to the corresponding > > APMT node. > > > > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> > > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > > for the change in bus.c, but as a side note, it would be good to move > all of the ARM-specific initialization into one place, so it is not > necessary to touch bus.c every time a new piece of it is added. > Agreed, I will look into that and move them all under single acpi_arm_init() or something.
Hi Besar, On Wed, Sep 28, 2022 at 07:28:34PM -0500, Besar Wicaksono wrote: > ARM Performance Monitoring Unit Table describes the properties of PMU > support in ARM-based system. The APMT table contains a list of nodes, > each represents a PMU in the system that conforms to ARM CoreSight PMU > architecture. The properties of each node include information required > to access the PMU (e.g. MMIO base address, interrupt number) and also > identification. For more detailed information, please refer to the > specification below: > * APMT: https://developer.arm.com/documentation/den0117/latest > * ARM Coresight PMU: > https://developer.arm.com/documentation/ihi0091/latest > > The initial support adds the detection of APMT table and generic > infrastructure to create platform devices for ARM CoreSight PMUs. > Similar to IORT the root pointer of APMT is preserved during runtime > and each PMU platform device is given a pointer to the corresponding > APMT node. > This looks good to me know. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Hi Lorenzo, Not sure if there are any other arm specific ACPI changes in the queue for v6.2. Can you please add this too ?
[Please Besar update my email address according to MAINTAINERS - I missed this thread] On Fri, Oct 14, 2022 at 11:59:38AM +0100, Sudeep Holla wrote: > Hi Besar, > > On Wed, Sep 28, 2022 at 07:28:34PM -0500, Besar Wicaksono wrote: > > ARM Performance Monitoring Unit Table describes the properties of PMU > > support in ARM-based system. The APMT table contains a list of nodes, > > each represents a PMU in the system that conforms to ARM CoreSight PMU > > architecture. The properties of each node include information required > > to access the PMU (e.g. MMIO base address, interrupt number) and also > > identification. For more detailed information, please refer to the > > specification below: > > * APMT: https://developer.arm.com/documentation/den0117/latest > > * ARM Coresight PMU: > > https://developer.arm.com/documentation/ihi0091/latest > > > > The initial support adds the detection of APMT table and generic > > infrastructure to create platform devices for ARM CoreSight PMUs. > > Similar to IORT the root pointer of APMT is preserved during runtime > > and each PMU platform device is given a pointer to the corresponding > > APMT node. > > > > This looks good to me know. > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > > Hi Lorenzo, > > Not sure if there are any other arm specific ACPI changes in the queue > for v6.2. Can you please add this too ? We should just ask Catalin/Will to pick it up for the next kernel cycle, if there is no need to repost we can just remind them in a couple of weeks. This also requires Rafael's review - at least to acknowledge the change. Thanks, Lorenzo
On Fri, Oct 14, 2022 at 04:15:01PM +0200, Lorenzo Pieralisi wrote: [...] > This also requires Rafael's review - at least to acknowledge the > change. Never mind, Rafael has already acked it, so we just need to get it queued. Lorenzo
On Fri, Oct 14, 2022 at 11:59:38AM +0100, Sudeep Holla wrote: > Hi Besar, > > On Wed, Sep 28, 2022 at 07:28:34PM -0500, Besar Wicaksono wrote: > > ARM Performance Monitoring Unit Table describes the properties of PMU > > support in ARM-based system. The APMT table contains a list of nodes, > > each represents a PMU in the system that conforms to ARM CoreSight PMU > > architecture. The properties of each node include information required > > to access the PMU (e.g. MMIO base address, interrupt number) and also > > identification. For more detailed information, please refer to the > > specification below: > > * APMT: https://developer.arm.com/documentation/den0117/latest > > * ARM Coresight PMU: > > https://developer.arm.com/documentation/ihi0091/latest > > > > The initial support adds the detection of APMT table and generic > > infrastructure to create platform devices for ARM CoreSight PMUs. > > Similar to IORT the root pointer of APMT is preserved during runtime > > and each PMU platform device is given a pointer to the corresponding > > APMT node. > > > > This looks good to me know. > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > > Hi Lorenzo, > > Not sure if there are any other arm specific ACPI changes in the queue > for v6.2. Can you please add this too ? Hi Catalin, Will, would you mind picking this patch up for v6.2 please ? Thank you very much. Lorenzo
On Wed, 28 Sep 2022 19:28:34 -0500, Besar Wicaksono wrote: > ARM Performance Monitoring Unit Table describes the properties of PMU > support in ARM-based system. The APMT table contains a list of nodes, > each represents a PMU in the system that conforms to ARM CoreSight PMU > architecture. The properties of each node include information required > to access the PMU (e.g. MMIO base address, interrupt number) and also > identification. For more detailed information, please refer to the > specification below: > * APMT: https://developer.arm.com/documentation/den0117/latest > * ARM Coresight PMU: > https://developer.arm.com/documentation/ihi0091/latest > > [...] Applied to arm64 (for-next/acpi), thanks! [1/1] ACPI: ARM Performance Monitoring Unit Table (APMT) initial support https://git.kernel.org/arm64/c/6251d38059ae Cheers,
On Wed, Sep 28, 2022 at 07:28:34PM -0500, Besar Wicaksono wrote: > diff --git a/drivers/acpi/arm64/apmt.c b/drivers/acpi/arm64/apmt.c > new file mode 100644 > index 000000000000..f55167ca51e7 > --- /dev/null > +++ b/drivers/acpi/arm64/apmt.c > @@ -0,0 +1,177 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * ARM APMT table support. > + * Design document number: ARM DEN0117. > + * > + * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. > + * > + */ > + > +#define pr_fmt(fmt) "ACPI: APMT: " fmt > + > +#include <linux/acpi.h> > +#include <linux/acpi_apmt.h> > +#include <linux/init.h> > +#include <linux/kernel.h> > +#include <linux/platform_device.h> > + > +#define DEV_NAME "arm-cs-arch-pmu" > + > +/* There can be up to 3 resources: page 0 and 1 address, and interrupt. */ > +#define DEV_MAX_RESOURCE_COUNT 3 > + > +/* Root pointer to the mapped APMT table */ > +static struct acpi_table_header *apmt_table; > + > +static int __init apmt_init_resources(struct resource *res, > + struct acpi_apmt_node *node) > +{ > + int irq, trigger; > + int num_res = 0; > + > + res[num_res].start = node->base_address0; > + res[num_res].end = node->base_address0 + SZ_4K - 1; > + res[num_res].flags = IORESOURCE_MEM; > + > + num_res++; > + > + res[num_res].start = node->base_address1; > + res[num_res].end = node->base_address1 + SZ_4K - 1; > + res[num_res].flags = IORESOURCE_MEM; > + > + num_res++; > + > + if (node->ovflw_irq != 0) { > + trigger = (node->ovflw_irq_flags & ACPI_APMT_OVFLW_IRQ_FLAGS_MODE); > + trigger = (trigger == ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL) ? > + ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; > + irq = acpi_register_gsi(NULL, node->ovflw_irq, trigger, > + ACPI_ACTIVE_HIGH); > + > + if (irq <= 0) { > + pr_warn("APMT could not register gsi hwirq %d\n", irq); > + return num_res; > + } > + > + res[num_res].start = irq; > + res[num_res].end = irq; > + res[num_res].flags = IORESOURCE_IRQ; > + > + num_res++; > + } > + > + return num_res; > +} > + > +/** > + * apmt_add_platform_device() - Allocate a platform device for APMT node > + * @node: Pointer to device ACPI APMT node > + * > + * Returns: 0 on success, <0 failure > + */ > +static int __init apmt_add_platform_device(struct acpi_apmt_node *node, > + struct fwnode_handle *fwnode) I queued this already, but my testing kicked up a nit that 'fwnode' is not described in the kerneldoc. Please can you send a follow-up fix for that, based on for-next/acpi? The indentation is also pretty weird with extra parameter. Will
Hi Will, > -----Original Message----- > From: Will Deacon <will@kernel.org> > Sent: Monday, November 7, 2022 1:11 PM > To: Besar Wicaksono <bwicaksono@nvidia.com> > Cc: rafael@kernel.org; lenb@kernel.org; catalin.marinas@arm.com; > lorenzo.pieralisi@arm.com; guohanjun@huawei.com; > sudeep.holla@arm.com; linux-tegra@vger.kernel.org; Thierry Reding > <treding@nvidia.com>; Jonathan Hunter <jonathanh@nvidia.com>; Vikram > Sethi <vsethi@nvidia.com>; linux-acpi@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH v2] ACPI: ARM Performance Monitoring Unit Table > (APMT) initial support > > External email: Use caution opening links or attachments > > > On Wed, Sep 28, 2022 at 07:28:34PM -0500, Besar Wicaksono wrote: > > diff --git a/drivers/acpi/arm64/apmt.c b/drivers/acpi/arm64/apmt.c > > new file mode 100644 > > index 000000000000..f55167ca51e7 > > --- /dev/null > > +++ b/drivers/acpi/arm64/apmt.c > > @@ -0,0 +1,177 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * ARM APMT table support. > > + * Design document number: ARM DEN0117. > > + * > > + * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. > > + * > > + */ > > + > > +#define pr_fmt(fmt) "ACPI: APMT: " fmt > > + > > +#include <linux/acpi.h> > > +#include <linux/acpi_apmt.h> > > +#include <linux/init.h> > > +#include <linux/kernel.h> > > +#include <linux/platform_device.h> > > + > > +#define DEV_NAME "arm-cs-arch-pmu" > > + > > +/* There can be up to 3 resources: page 0 and 1 address, and interrupt. */ > > +#define DEV_MAX_RESOURCE_COUNT 3 > > + > > +/* Root pointer to the mapped APMT table */ > > +static struct acpi_table_header *apmt_table; > > + > > +static int __init apmt_init_resources(struct resource *res, > > + struct acpi_apmt_node *node) > > +{ > > + int irq, trigger; > > + int num_res = 0; > > + > > + res[num_res].start = node->base_address0; > > + res[num_res].end = node->base_address0 + SZ_4K - 1; > > + res[num_res].flags = IORESOURCE_MEM; > > + > > + num_res++; > > + > > + res[num_res].start = node->base_address1; > > + res[num_res].end = node->base_address1 + SZ_4K - 1; > > + res[num_res].flags = IORESOURCE_MEM; > > + > > + num_res++; > > + > > + if (node->ovflw_irq != 0) { > > + trigger = (node->ovflw_irq_flags & > ACPI_APMT_OVFLW_IRQ_FLAGS_MODE); > > + trigger = (trigger == > ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL) ? > > + ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; > > + irq = acpi_register_gsi(NULL, node->ovflw_irq, trigger, > > + ACPI_ACTIVE_HIGH); > > + > > + if (irq <= 0) { > > + pr_warn("APMT could not register gsi hwirq %d\n", irq); > > + return num_res; > > + } > > + > > + res[num_res].start = irq; > > + res[num_res].end = irq; > > + res[num_res].flags = IORESOURCE_IRQ; > > + > > + num_res++; > > + } > > + > > + return num_res; > > +} > > + > > +/** > > + * apmt_add_platform_device() - Allocate a platform device for APMT > node > > + * @node: Pointer to device ACPI APMT node > > + * > > + * Returns: 0 on success, <0 failure > > + */ > > +static int __init apmt_add_platform_device(struct acpi_apmt_node > *node, > > + struct fwnode_handle *fwnode) > > I queued this already, but my testing kicked up a nit that 'fwnode' is not > described in the kerneldoc. Please can you send a follow-up fix for that, > based on for-next/acpi? The indentation is also pretty weird with extra > parameter. > Thanks for getting this patch. I have sent the follow-up fix with: https://lore.kernel.org/linux-arm-kernel/20221111234323.16182-1-bwicaksono@nvidia.com/ Regards, Besar > Will
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index aaeb70358979..dbcb09ee29dd 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config ARM64 def_bool y + select ACPI_APMT if ACPI select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI select ACPI_GTDT if ACPI diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig index d4a72835f328..b3ed6212244c 100644 --- a/drivers/acpi/arm64/Kconfig +++ b/drivers/acpi/arm64/Kconfig @@ -18,3 +18,6 @@ config ACPI_AGDI reset command. If set, the kernel parses AGDI table and listens for the command. + +config ACPI_APMT + bool diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile index 7b9e4045659d..e21a9e84e394 100644 --- a/drivers/acpi/arm64/Makefile +++ b/drivers/acpi/arm64/Makefile @@ -2,4 +2,5 @@ obj-$(CONFIG_ACPI_AGDI) += agdi.o obj-$(CONFIG_ACPI_IORT) += iort.o obj-$(CONFIG_ACPI_GTDT) += gtdt.o +obj-$(CONFIG_ACPI_APMT) += apmt.o obj-y += dma.o diff --git a/drivers/acpi/arm64/apmt.c b/drivers/acpi/arm64/apmt.c new file mode 100644 index 000000000000..f55167ca51e7 --- /dev/null +++ b/drivers/acpi/arm64/apmt.c @@ -0,0 +1,177 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM APMT table support. + * Design document number: ARM DEN0117. + * + * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. + * + */ + +#define pr_fmt(fmt) "ACPI: APMT: " fmt + +#include <linux/acpi.h> +#include <linux/acpi_apmt.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> + +#define DEV_NAME "arm-cs-arch-pmu" + +/* There can be up to 3 resources: page 0 and 1 address, and interrupt. */ +#define DEV_MAX_RESOURCE_COUNT 3 + +/* Root pointer to the mapped APMT table */ +static struct acpi_table_header *apmt_table; + +static int __init apmt_init_resources(struct resource *res, + struct acpi_apmt_node *node) +{ + int irq, trigger; + int num_res = 0; + + res[num_res].start = node->base_address0; + res[num_res].end = node->base_address0 + SZ_4K - 1; + res[num_res].flags = IORESOURCE_MEM; + + num_res++; + + res[num_res].start = node->base_address1; + res[num_res].end = node->base_address1 + SZ_4K - 1; + res[num_res].flags = IORESOURCE_MEM; + + num_res++; + + if (node->ovflw_irq != 0) { + trigger = (node->ovflw_irq_flags & ACPI_APMT_OVFLW_IRQ_FLAGS_MODE); + trigger = (trigger == ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL) ? + ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; + irq = acpi_register_gsi(NULL, node->ovflw_irq, trigger, + ACPI_ACTIVE_HIGH); + + if (irq <= 0) { + pr_warn("APMT could not register gsi hwirq %d\n", irq); + return num_res; + } + + res[num_res].start = irq; + res[num_res].end = irq; + res[num_res].flags = IORESOURCE_IRQ; + + num_res++; + } + + return num_res; +} + +/** + * apmt_add_platform_device() - Allocate a platform device for APMT node + * @node: Pointer to device ACPI APMT node + * + * Returns: 0 on success, <0 failure + */ +static int __init apmt_add_platform_device(struct acpi_apmt_node *node, + struct fwnode_handle *fwnode) +{ + struct platform_device *pdev; + int ret, count; + struct resource res[DEV_MAX_RESOURCE_COUNT]; + + pdev = platform_device_alloc(DEV_NAME, PLATFORM_DEVID_AUTO); + if (!pdev) + return -ENOMEM; + + memset(res, 0, sizeof(res)); + + count = apmt_init_resources(res, node); + + ret = platform_device_add_resources(pdev, res, count); + if (ret) + goto dev_put; + + /* + * Add a copy of APMT node pointer to platform_data to be used to + * retrieve APMT data information. + */ + ret = platform_device_add_data(pdev, &node, sizeof(node)); + if (ret) + goto dev_put; + + pdev->dev.fwnode = fwnode; + + ret = platform_device_add(pdev); + + if (ret) + goto dev_put; + + return 0; + +dev_put: + platform_device_put(pdev); + + return ret; +} + +static int __init apmt_init_platform_devices(void) +{ + struct acpi_apmt_node *apmt_node; + struct acpi_table_apmt *apmt; + struct fwnode_handle *fwnode; + u64 offset, end; + int ret; + + /* + * apmt_table and apmt both point to the start of APMT table, but + * have different struct types + */ + apmt = (struct acpi_table_apmt *)apmt_table; + offset = sizeof(*apmt); + end = apmt->header.length; + + while (offset < end) { + apmt_node = ACPI_ADD_PTR(struct acpi_apmt_node, apmt, + offset); + + fwnode = acpi_alloc_fwnode_static(); + if (!fwnode) + return -ENOMEM; + + ret = apmt_add_platform_device(apmt_node, fwnode); + if (ret) { + acpi_free_fwnode_static(fwnode); + return ret; + } + + offset += apmt_node->length; + } + + return 0; +} + +void __init acpi_apmt_init(void) +{ + acpi_status status; + int ret; + + /** + * APMT table nodes will be used at runtime after the apmt init, + * so we don't need to call acpi_put_table() to release + * the APMT table mapping. + */ + status = acpi_get_table(ACPI_SIG_APMT, 0, &apmt_table); + + if (ACPI_FAILURE(status)) { + if (status != AE_NOT_FOUND) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get APMT table, %s\n", msg); + } + + return; + } + + ret = apmt_init_platform_devices(); + if (ret) { + pr_err("Failed to initialize APMT platform devices, ret: %d\n", ret); + acpi_put_table(apmt_table); + } +} diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 86fa61a21826..f9dc5b3d5c55 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -27,6 +27,7 @@ #include <linux/dmi.h> #endif #include <linux/acpi_agdi.h> +#include <linux/acpi_apmt.h> #include <linux/acpi_iort.h> #include <linux/acpi_viot.h> #include <linux/pci.h> @@ -1411,6 +1412,7 @@ static int __init acpi_init(void) acpi_setup_sb_notify_handler(); acpi_viot_init(); acpi_agdi_init(); + acpi_apmt_init(); return 0; } diff --git a/include/linux/acpi_apmt.h b/include/linux/acpi_apmt.h new file mode 100644 index 000000000000..40bd634d082f --- /dev/null +++ b/include/linux/acpi_apmt.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * ARM CoreSight PMU driver. + * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. + * + */ + +#ifndef __ACPI_APMT_H__ +#define __ACPI_APMT_H__ + +#include <linux/acpi.h> + +#ifdef CONFIG_ACPI_APMT +void acpi_apmt_init(void); +#else +static inline void acpi_apmt_init(void) { } +#endif /* CONFIG_ACPI_APMT */ + +#endif /* __ACPI_APMT_H__ */
ARM Performance Monitoring Unit Table describes the properties of PMU support in ARM-based system. The APMT table contains a list of nodes, each represents a PMU in the system that conforms to ARM CoreSight PMU architecture. The properties of each node include information required to access the PMU (e.g. MMIO base address, interrupt number) and also identification. For more detailed information, please refer to the specification below: * APMT: https://developer.arm.com/documentation/den0117/latest * ARM Coresight PMU: https://developer.arm.com/documentation/ihi0091/latest The initial support adds the detection of APMT table and generic infrastructure to create platform devices for ARM CoreSight PMUs. Similar to IORT the root pointer of APMT is preserved during runtime and each PMU platform device is given a pointer to the corresponding APMT node. Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> --- The patch applies on top of https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master next-20220524 Changes from v1: * Include acpi_apmt.h header file * Update the device name. Related driver patch: https://lore.kernel.org/linux-arm-kernel/20220928201830.45637-1-bwicaksono@nvidia.com/ v1: https://lkml.org/lkml/2022/4/19/1395 arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/apmt.c | 177 ++++++++++++++++++++++++++++++++++++ drivers/acpi/bus.c | 2 + include/linux/acpi_apmt.h | 19 ++++ 6 files changed, 203 insertions(+) create mode 100644 drivers/acpi/arm64/apmt.c create mode 100644 include/linux/acpi_apmt.h base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a