| Message ID | 20221001185526.494095-3-martin.botka@somainline.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] dt-bindings: dma: gpi: Document SM6125 compatible | expand |
On 01/10/2022 20:55, Martin Botka wrote: > This commit adds and configures GPI DMA nodes. > > Signed-off-by: Martin Botka <martin.botka@somainline.org> > --- > arch/arm64/boot/dts/qcom/sm6125.dtsi | 37 ++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index d35ea4474234..7e135041bd42 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -6,6 +6,7 @@ > #include <dt-bindings/clock/qcom,dispcc-sm6125.h> > #include <dt-bindings/clock/qcom,gcc-sm6125.h> > #include <dt-bindings/clock/qcom,rpmcc.h> > +#include <dt-bindings/dma/qcom-gpi.h> > #include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/power/qcom-rpmpd.h> > @@ -1076,6 +1077,42 @@ sdhc_2: mmc@4784000 { > status = "disabled"; > }; > > + gpi_dma0: dma-controller@4a00000 { > + compatible = "qcom,sm6125-gpi-dma"; You will need here sdm845 fallback. > + #dma-cells = <5>; > + reg = <0x04a00000 0x60000>; > + iommus = <&apps_smmu 0x0136 0x0>; > + dma-channels = <8>; > + dma-channel-mask = <0x1f>; > + interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; > + status = "okay"; No need, its okay by default. Both comments apply everywhere. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index d35ea4474234..7e135041bd42 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/clock/qcom,dispcc-sm6125.h> #include <dt-bindings/clock/qcom,gcc-sm6125.h> #include <dt-bindings/clock/qcom,rpmcc.h> +#include <dt-bindings/dma/qcom-gpi.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> @@ -1076,6 +1077,42 @@ sdhc_2: mmc@4784000 { status = "disabled"; }; + gpi_dma0: dma-controller@4a00000 { + compatible = "qcom,sm6125-gpi-dma"; + #dma-cells = <5>; + reg = <0x04a00000 0x60000>; + iommus = <&apps_smmu 0x0136 0x0>; + dma-channels = <8>; + dma-channel-mask = <0x1f>; + interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; + }; + + gpi_dma1: dma-controller@4c00000 { + compatible = "qcom,sm6125-gpi-dma"; + #dma-cells = <5>; + reg = <0x04c00000 0x60000>; + iommus = <&apps_smmu 0x0156 0x0>; + dma-channels = <8>; + dma-channel-mask = <0x0f>; + interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; + }; + qupv3_id_0: geniqup@4ac0000 { compatible = "qcom,geni-se-qup"; reg = <0x04ac0000 0x2000>;
This commit adds and configures GPI DMA nodes. Signed-off-by: Martin Botka <martin.botka@somainline.org> --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 37 ++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+)