| Message ID | 20221005083730.963322-2-stanimir.varbanov@linaro.org |
|---|---|
| State | Accepted |
| Commit | bd32d0851c1d9879a4c792a31319b45e94ed3801 |
| Headers | show |
| Series | [1/3] venus: firmware: Correct reset bit | expand |
diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index 14b6f1d05991..3851cedc3329 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -68,9 +68,11 @@ int venus_set_hw_state(struct venus_core *core, bool resume) venus_reset_cpu(core); } else { if (IS_V6(core)) - writel(1, core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET); + writel(WRAPPER_XTSS_SW_RESET_BIT, + core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET); else - writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); + writel(WRAPPER_A9SS_SW_RESET_BIT, + core->wrapper_base + WRAPPER_A9SS_SW_RESET); } return 0;
The reset bit for A9SS reset register is BIT(4) and for XTSS_SW_RESET it is BIT(0). Use the defines for those reset bits. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> --- drivers/media/platform/qcom/venus/firmware.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)