@@ -35,6 +35,7 @@
#define IMX2_WDT_WCR 0x00 /* Control Register */
#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
+#define IMX2_WDT_WCR_WDW BIT(7) /* -> Watchdog disable for WAIT */
#define IMX2_WDT_WCR_WDA BIT(5) /* -> External Reset WDOG_B */
#define IMX2_WDT_WCR_SRS BIT(4) /* -> Software Reset Signal */
#define IMX2_WDT_WCR_WRE BIT(3) /* -> WDOG Reset Enable */
@@ -67,6 +68,7 @@ struct imx2_wdt_device {
bool ext_reset;
bool clk_is_on;
bool no_ping;
+ bool sleep_wait;
};
static bool nowayout = WATCHDOG_NOWAYOUT;
@@ -129,6 +131,9 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
/* Suspend timer in low power mode, write once-only */
val |= IMX2_WDT_WCR_WDZST;
+ /* Suspend timer in low power WAIT mode, write once-only */
+ if (wdev->sleep_wait)
+ val |= IMX2_WDT_WCR_WDW;
/* Strip the old watchdog Time-Out value */
val &= ~IMX2_WDT_WCR_WT;
/* Generate internal chip-level reset if WDOG times out */
@@ -313,6 +318,8 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
wdev->ext_reset = of_property_read_bool(dev->of_node,
"fsl,ext-reset-output");
+ wdev->sleep_wait = of_property_read_bool(dev->of_node,
+ "fsl,suspend-in-wait");
/*
* The i.MX7D doesn't support low power mode, so we need to ping the watchdog
* during suspend.
Putting device into the "Suspend-To-Idle" mode causes watchdog to trigger and reset the board after set watchdog timeout period elapses. Introduce new device-tree property "fsl,suspend-in-wait" which suspends watchdog in WAIT mode. This is done by setting WDW bit in WCR (Watchdog Control Register) Watchdog operation is restored after exiting WAIT mode as expected. WAIT mode coresponds with Linux's "Suspend-To-Idle". Signed-off-by: Andrej Picej <andrej.picej@norik.com> --- drivers/watchdog/imx2_wdt.c | 7 +++++++ 1 file changed, 7 insertions(+)