diff mbox series

[v10,5/7] media: chips-media: wave5: Add TODO file

Message ID 20221022000506.221933-6-sebastian.fricke@collabora.com
State New
Headers show
Series Wave5 codec driver | expand

Commit Message

Sebastian Fricke Oct. 22, 2022, 12:05 a.m. UTC 
From: Nas Chung <nas.chung@chipsnmedia.com>

Add a TODO file with remaining elements to be improved/added.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Signed-off-by: Nas Chung <nas.chung@chipsnmedia.com>
---
 drivers/staging/media/wave5/TODO | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 drivers/staging/media/wave5/TODO
diff mbox series

Patch

diff --git a/drivers/staging/media/wave5/TODO b/drivers/staging/media/wave5/TODO
new file mode 100644
index 000000000000..6cc38d4ccbc9
--- /dev/null
+++ b/drivers/staging/media/wave5/TODO
@@ -0,0 +1,25 @@ 
+* Handle interrupts better
+
+Currently the interrupt handling uses an unusual design employing a kfifo to
+transfer irq status to irq thread. This was done as a work around for dropped
+interrupts seen with IRQF_ONESHOT based handling.
+
+This needs further investigation and fixing properly, with the aid of
+C&M and StarFive engineers.
+
+* remove all struct fields, that are assigned to but not used in the code, add
+  documentation about each removed field at the macro for the register it is
+  related too.
+
+* power management handling - add (runtime_)suspen/resume cb where the clock is enabled
+
+* revise logic of wave5_vpu_(dec/enc)_register_framebuffer
+
+* check if the  normal kernel endianness/__swab32 routines are sufficient. (instead of the ones
+  implemented in the driver)
+
+* Extended Codec Controls for encoder.
+
+implement extended codec control for HEVC/H264 encoder.
+PROFILE/LEVEL/MIN_QP/MAX_QP/LOOP_FILTER/HFLIP/VFIIP/ROTATE/
+GOP_SIZE/RC_ENABLE/I_PERIOD/BITRATE.