[v5] phy: qcom-qmp-ufs: provide symbol clocks

Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
provider to let other devices link these clocks through the DT.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---

Changes since v4:
- Rebased, dropping merged clk patches
- Fix whitespace errors
- Add linebreaks to fit into 100 chars limit

---
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 61 +++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

On Fri, Oct 28, 2022 at 03:51:48PM +0300, Dmitry Baryshkov wrote:
> Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
> ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
> provider to let other devices link these clocks through the DT.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> 
> Changes since v4:
> - Rebased, dropping merged clk patches
> - Fix whitespace errors
> - Add linebreaks to fit into 100 chars limit
> 
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 61 +++++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> index e28c45ab74ea..f60e29c68c26 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> @@ -1067,6 +1067,60 @@ static int qmp_ufs_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg)
>  	return devm_clk_bulk_get(dev, num, qmp->clks);
>  }
>  
> +static void phy_clk_release_provider(void *res)
> +{
> +	of_clk_del_provider(res);
> +}
> +
> +#define UFS_SYMBOL_CLOCKS 3
> +
> +static int phy_symbols_clk_register(struct qcom_qmp *qmp, struct device_node *np)
> +{
> +	struct clk_hw_onecell_data *clk_data;
> +	struct clk_hw *hw;
> +	char name[64];
> +	int ret;
> +
> +	clk_data = devm_kzalloc(qmp->dev,
> +				struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS),
> +				GFP_KERNEL);
> +	if (!clk_data)
> +		return -ENOMEM;
> +
> +	clk_data->num = UFS_SYMBOL_CLOCKS;
> +
> +	snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev));
> +	hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);

Wouldn't it be desirable to provide a non-zero frequency for these
clocks?

Regards,
Bjorn

> +	if (IS_ERR(hw))
> +		return PTR_ERR(hw);
> +
> +	clk_data->hws[0] = hw;
> +
> +	snprintf(name, sizeof(name), "%s::rx_symbol_1", dev_name(qmp->dev));
> +	hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
> +	if (IS_ERR(hw))
> +		return PTR_ERR(hw);
> +
> +	clk_data->hws[1] = hw;
> +
> +	snprintf(name, sizeof(name), "%s::tx_symbol_0", dev_name(qmp->dev));
> +	hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
> +	if (IS_ERR(hw))
> +		return PTR_ERR(hw);
> +
> +	clk_data->hws[2] = hw;
> +
> +	ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
> +	if (ret)
> +		return ret;
> +
> +	/*
> +	 * Roll a devm action because the clock provider is the child node, but
> +	 * the child node is not actually a device.
> +	 */
> +	return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np);
> +}
> +
>  static const struct phy_ops qcom_qmp_ufs_ops = {
>  	.power_on	= qmp_ufs_enable,
>  	.power_off	= qmp_ufs_disable,
> @@ -1232,6 +1286,13 @@ static int qmp_ufs_probe(struct platform_device *pdev)
>  			goto err_node_put;
>  		}
>  
> +		ret = phy_symbols_clk_register(qmp, child);
> +		if (ret) {
> +			dev_err(dev, "failed to create symbol clocks, %d\n",
> +				ret);
> +			goto err_node_put;
> +		}
> +
>  		id++;
>  	}
>  
> -- 
> 2.35.1
>

On Fri, 28 Oct 2022 at 16:40, Bjorn Andersson <andersson@kernel.org> wrote:
>
> On Fri, Oct 28, 2022 at 03:51:48PM +0300, Dmitry Baryshkov wrote:
> > Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
> > ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
> > provider to let other devices link these clocks through the DT.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> >
> > Changes since v4:
> > - Rebased, dropping merged clk patches
> > - Fix whitespace errors
> > - Add linebreaks to fit into 100 chars limit
> >
> > ---
> >  drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 61 +++++++++++++++++++++++++
> >  1 file changed, 61 insertions(+)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> > index e28c45ab74ea..f60e29c68c26 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> > @@ -1067,6 +1067,60 @@ static int qmp_ufs_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg)
> >       return devm_clk_bulk_get(dev, num, qmp->clks);
> >  }
> >
> > +static void phy_clk_release_provider(void *res)
> > +{
> > +     of_clk_del_provider(res);
> > +}
> > +
> > +#define UFS_SYMBOL_CLOCKS 3
> > +
> > +static int phy_symbols_clk_register(struct qcom_qmp *qmp, struct device_node *np)
> > +{
> > +     struct clk_hw_onecell_data *clk_data;
> > +     struct clk_hw *hw;
> > +     char name[64];
> > +     int ret;
> > +
> > +     clk_data = devm_kzalloc(qmp->dev,
> > +                             struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS),
> > +                             GFP_KERNEL);
> > +     if (!clk_data)
> > +             return -ENOMEM;
> > +
> > +     clk_data->num = UFS_SYMBOL_CLOCKS;
> > +
> > +     snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev));
> > +     hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
>
> Wouldn't it be desirable to provide a non-zero frequency for these
> clocks?

Is there a stable frequency that we can provide here? If I remember
correctly from my tests, UFS symbol frequencies vary depending on the
workload (but I might be mistaken here).